Pointed-Trench Pixel Array for Vertical Photoelectron Transfer
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Solution Overview
Problem
The existing camera pixel architectures with horizontal transfer gates limit pixel density due to trapped photoelectrons, resulting in image artifacts like black dots and ghost images, as the electric field and surface roughness prevent efficient electron transport from the photodiode to the floating diffusion region.
Innovation Solution
A pointed-trench pixel-array substrate design is introduced, featuring a V-shaped trench bottom surface and a vertical transfer gate structure that allows photoelectrons to reach the floating diffusion region efficiently, reducing electron transport lag and image artifacts by optimizing the trench geometry and dielectric layers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If a horizontal transfer gate structure is used, then the device complexity is reduced, but the pixel density cannot be increased further due to trapped photoelectrons causing image artifacts
Solution Approach 1:
The patent transitions from a horizontal transfer gate structure to a vertical transfer gate structure by changing the spatial orientation of the transfer path. The trench extends vertically into the semiconductor substrate, and the gate electrode is positioned vertically between the photodiode and floating diffusion region, enabling photoelectron transport in the vertical dimension rather than horizontally. This dimensional change allows increased pixel density while maintaining efficient electron transport.
Solution Approach 2:
The patent employs a composite structure combining the semiconductor substrate, dielectric material lining the trench, and conductive gate electrode material. The dielectric layer with specific permittivity characteristics works in conjunction with the vertical gate electrode to create an optimized electric field distribution that prevents photoelectron trapping while enabling efficient vertical transport.
2Reliability
If the trench bottom surface is made smooth, then manufacturing precision is improved, but photoelectrons are trapped due to lack of surface roughness effects
Solution Approach 1:
The patent applies different quality characteristics to different regions of the trench structure. The trench sidewalls are formed with high manufacturing precision and smooth surfaces, while the bottom surface intentionally retains controlled roughness features. This local differentiation allows the rough bottom surface to prevent photoelectron trapping through enhanced electric field distribution, while the precision-formed sidewalls maintain structural integrity and alignment.
3Reliability
If the trench depth is increased, then the vertical transfer gate effectiveness is improved, but the manufacturing complexity increases
Solution Approach 1:
The patent incorporates a dielectric lining layer in the trench before forming the gate electrode structure. This preliminary action of lining the trench with dielectric material serves multiple functions: it defines the trench depth and geometry, provides electrical isolation, and facilitates subsequent gate electrode formation. The dielectric layer acts as a pre-formed structure that guides the etching process and simplifies the overall manufacturing sequence.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enhances pixel density and image quality by ensuring that photoelectrons are effectively transferred to the floating diffusion region, reducing image artifacts and improving the overall resolution and efficiency of the camera module.
Implementation Method 1
Light reaching the photodiode generates photoelectrons
Implementation Method 2
the electric field beneath the bottom of the trench has only a vertical component
Data Source
AI summary
A pointed-trench pixel-array substrate includes a floating diffusion region and a photodiode region formed in a semiconductor substrate. The semiconductor substrate includes, between a top surface and a back surface thereof, a sidewall surface and a bottom surface defining a trench extending into the semiconductor substrate away from a planar region of the top surface surrounding the trench. In a cross-sectional plane perpendicular to the top surface and intersecting the floating diffusion region, the photodiode region, and the trench, (i) the bottom surface is V-shaped and (ii) the trench is located between the floating diffusion region and the photodiode region.