Hafnium Oxide Dielectric Stack for Low-Temperature Crystallization
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Solution Overview
Problem
Current semiconductor memory devices face limitations in reducing memory cell area and operating voltage, with zirconium oxide-based dielectric layers having a restricted ability to increase capacitance while maintaining low leakage current.
Innovation Solution
A semiconductor device with a dielectric layer stack comprising a hafnium oxide-based layer, a seed layer, a doping layer, and a leakage blocking layer, where the hafnium oxide layer is crystallized at a low temperature using a seed and thermal source layer, and the leakage blocking layer has a lower dielectric constant and higher bandgap than the hafnium oxide layer, to enhance capacitance and reduce leakage current.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If zirconium oxide is used as the dielectric layer to increase capacitance, then the dielectric constant is improved, but the leakage current cannot be sufficiently reduced
Solution Approach 1:
The patent employs a composite dielectric layer structure consisting of a hafnium oxide layer and a zirconium oxide layer. The hafnium oxide layer provides high dielectric constant for increased capacitance, while the zirconium oxide layer acts as a leakage blocking layer to suppress leakage current. This composite structure combines the advantages of both materials to simultaneously achieve high capacitance and low leakage current.
Solution Approach 2:
The patent applies different materials with different properties to different regions of the dielectric layer. The hafnium oxide layer is positioned where high capacitance is needed, while the zirconium oxide layer is positioned where leakage blocking is critical. This local differentiation of material properties optimizes both capacitance and leakage current characteristics in their respective regions.
2Area of stationary object
If high-temperature crystallization is used to form the hafnium oxide layer, then the dielectric constant is improved, but the manufacturing process complexity and energy consumption increase
Solution Approach 1:
The patent changes the crystallization temperature parameter from conventional high temperatures to a lower temperature range of 400°C to 600°C. This is achieved by introducing a seed layer that facilitates crystallization at lower temperatures, thereby reducing energy consumption while still achieving the desired tetragonal crystal structure with high dielectric constant.
Solution Approach 2:
The patent introduces a seed layer as an intermediary substance that mediates the crystallization process. The seed layer, composed of materials such as zirconium oxide, hafnium zirconate, or hafnium oxide, provides nucleation sites that enable the hafnium oxide layer to crystallize at lower temperatures, thus acting as a mediator between the amorphous hafnium oxide and the desired crystalline structure.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively increases capacitance and reduces leakage current in semiconductor devices without the need for high-temperature crystallization, enabling more efficient memory storage and operation.
Implementation Method 1
forming a thermal source layer on the dielectric layer stack to crystallize the initial hafnium oxide into tetragonal hafnium oxide
Data Source
AI summary
A method for fabricating a capacitor includes forming a first electrode, forming a dielectric layer stack on the first electrode, the dielectric layer stack including an initial hafnium oxide layer and a seed layer having a doping layer embedded therein, forming a thermal source layer on the dielectric layer stack to crystallize the initial hafnium oxide into tetragonal hafnium oxide, and forming a second electrode on the thermal source layer.