Composite Metal Oxide Channel Structure for 3D Memory Leakage Control
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Solution Overview
Problem
Current three-dimensional memory devices face challenges with insufficient on-current, bias instability, and high leakage current due to the limitations of single layer metal oxide semiconductor channels, particularly in metal oxide semiconductor materials like indium gallium zinc oxide (IGZO).
Innovation Solution
The implementation of a composite metal oxide semiconductor channel structure comprising an outer semiconducting metal oxide channel layer with a first band gap and an inner semiconducting metal oxide channel layer with a second band gap, differing from the first, enhances charge carrier mobility, reduces leakage current, and improves the subthreshold slope by using layers such as indium tin zinc oxide (ITZO) and indium gallium zinc oxide (IGZO) in a vertical NAND device configuration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If single-layer metal oxide semiconductor channels are used, then device structure is simple, but charge carrier mobility is insufficient and leakage current is high
Solution Approach 1:
The semiconductor channel is segmented into multiple distinct layers (first semiconductor channel layer and second semiconductor channel layer) with different band gaps, allowing each layer to contribute differently to charge transport and blocking properties, thereby improving overall device reliability without requiring excessive structural complexity
Solution Approach 2:
The patent employs composite metal oxide semiconductor materials with different band gap energies arranged in a vertical stack, combining the advantages of each material to achieve both high charge carrier mobility and low leakage current while maintaining a manageable device structure
2Reliability
If single-layer metal oxide semiconductor channels are used, then manufacturing process is simple, but on-current performance is poor
Solution Approach 1:
The channel is divided into multiple functional layers that can be deposited sequentially using standard semiconductor fabrication techniques, enabling improved on-current performance through material composition optimization without significantly increasing manufacturing process complexity
Solution Approach 2:
The patent varies the band gap parameter across different channel layers to optimize charge transport properties, achieving superior on-current performance by tuning material composition and layer thickness within existing manufacturing capabilities
3Reliability
If single-layer metal oxide semiconductor channels are used, then device structure is simple, but leakage current is high
Solution Approach 1:
Different regions of the channel (inner vs. outer layers) are assigned different material properties with distinct band gaps, creating local quality variations that specifically target leakage current suppression at critical interfaces while maintaining overall structural simplicity
Solution Approach 2:
The composite channel structure combines metal oxide semiconductor materials with different band gap energies to create a multi-functional channel that simultaneously achieves low leakage current and acceptable device complexity through careful material selection and layer design
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This composite channel structure achieves higher charge carrier mobility, lower leakage current, and a smaller subthreshold slope compared to single layer metal oxide semiconductor channels, thereby enhancing the performance and reliability of three-dimensional memory devices.
Implementation Method 1
an inner semiconducting metal oxide channel layer having a second band gap that is different from the first band gap
Data Source
AI summary
A three-dimensional memory device includes an alternating stack of insulating layers and electrically conductive layers, a memory opening vertically extending through the alternating stack, and a memory opening fill structure located in the memory opening and including a memory film and a vertical composite metal oxide semiconductor channel that contains an outer semiconducting metal oxide channel layer having a first band gap and an inner semiconducting metal oxide channel layer having a second band gap that is different from the first band gap.


