BISoR Controller Parallel Memory Repair
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Integrated circuits face challenges in efficiently testing and repairing on-chip memory blocks due to the time-consuming serial testing process, especially when memory density is high, which can lead to increased area and costs if more Built-In Self Test (BIST) circuits are implemented.
Innovation Solution
The integration of a Built-In Soft-Repair Controller (BISoR) with the BIST circuit allows for parallel testing and soft repair of memory blocks, where error data is collected and used for soft repair of subsequent blocks, reducing the overall testing and repair time while minimizing area overhead.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If serial testing of memory blocks is performed by a single BIST circuit, then area usage is minimized, but testing time increases significantly
Solution Approach 1:
The BISoR performs preliminary actions by collecting error data from memory blocks during testing, converting it to soft repair data, and storing it in internal memory before the next memory block is tested. This preparation work is done in advance so that when parallel testing occurs, the repair data is already ready, enabling faster processing without increasing area
Solution Approach 2:
The testing process is segmented into distinct phases: error data collection, data conversion to soft repair format, storage in internal memory, and application to memory blocks. The BISoR is dedicated to specific memory arrays, creating segmented processing units that can operate in parallel, reducing overall testing time while maintaining reasonable area usage
2Loss of time
If more BIST circuits are implemented to test memory blocks in parallel, then testing time is reduced, but area and costs increase
Solution Approach 1:
The BISoR is designed with multi-functionality, serving multiple memory arrays while performing multiple operations: error data collection, conversion to soft repair data, storage management, and repair application. This universal controller can be shared across multiple memory blocks, eliminating the need for separate BIST circuits for each block, thus reducing area while enabling parallel processing capabilities
Solution Approach 2:
The BISoR acts as an intermediary between the BIST circuit and the memory blocks. It receives error data from the BIST circuit, processes it through conversion and storage, and then applies soft repair data to the appropriate memory blocks. This intermediary role allows the system to achieve parallel processing efficiency without requiring multiple full BIST circuits, optimizing the area-time tradeoff
Data Source
AI summary
A built-in self-test (BIST) circuit to test one or more memory blocks on an integrated circuit. The one or more memory blocks further includes a first memory block and a second memory block A built-in soft-repair controller (BISoR) is provided to soft repair the one or more memory blocks. The BIST circuit in conjunction with the BISoR is configured to test and soft repair the first memory block before performing test and soft repair of the second memory block.