Static Storage TRIZ Cases
- Memory Controller Voting Circuit Energy Reduction
A memory controller uses a voting circuit to determine majority content from duplicated data segments.
- Bit-Scale Memory Correction via Redundant Byte Replacement
A correcting byte replaces underperforming bits within memory bytes to reduce resource consumption.
- Memory Device ECC Engine and Row Fail Detector for Error Management
A memory device integrates an ECC engine with a row fail detector to identify defective rows and correct data errors during read operations.
- Memory System ECC Channel DBI Transmission
Host transmits data bus inversion information through unused error correction channels to eliminate buffer dies and reduce power consumption.
- Semiconductor Reliability Verification Unit for Low-k Material Impact Detection
A semiconductor reliability verifying unit detects physical damage in low dielectric constant chips using delayed signal transmission.
- Data Compression Test Circuit for Stacked Semiconductor Memory
A data compression test circuit merges signals from multiple memory banks to generate a single final determination signal.
- Test Pattern Generator Reducing Overlap via History Storage
A test pattern generator uses a history storage circuit to classify command address combinations for memory verification.
- Storage Controller Read Latency Reduction via Mapping Table Overlap
A storage controller overlaps logical mapping table retrieval with data read operations to reduce average access time.
- Built-In Self-Test Circuit for Compute-in-Memory MAC Operations
A built-in self-test circuit generates input vectors and weights to perform multiply-accumulate operations within a compute-in-memory macro.
- Storage Controller Interface Training Voltage Timing Optimization
A storage controller loads test data patterns into buffers on both the controller and storage medium to determine optimal read voltage and timing parameters.