Built-In Self-Test Circuit for Compute-in-Memory MAC Operations
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Solution Overview
Problem
Performing Built-In Self-Test (BIST) in Compute in Memory (CIM) systems is challenging due to the lack of effective testing methods for MAC operations embedded within the CIM macro, which are essential for deep learning applications and require high energy efficiency and accuracy.
Innovation Solution
A BIST circuit is configured to generate input data and weights for the CIM macro, performing MAC operations and comparing the results with signature values to determine faultiness, using a combination of deterministic and random input vectors and weight generation methods, allowing for high-test coverage and fault diagnosis without modifying the existing CIM macro.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If discreet logic circuits are used to implement MAC operations, then the operations can be performed, but energy consumption is high and circuit implementation is large
Solution Approach 1:
The patent replaces traditional discreet logic circuits with Compute-in-Memory (CIM) architecture that performs MAC operations directly within the memory array using analog computing. This substitution eliminates the need for separate logic circuits, reducing both energy consumption and circuit complexity while maintaining computational functionality.
Solution Approach 2:
The CIM macro integrates multiple functions including data storage, weight storage, and MAC operation execution within a single unified structure. This multi-functionality eliminates the need for separate discrete circuits for each operation, thereby reducing overall circuit implementation complexity and energy consumption.
2Use of energy by moving object
If CIM macro is used for deep learning applications, then energy efficiency is improved, but Built-In Self-Test capability is lacking
Solution Approach 1:
The patent implements a Self-Test Macro within the CIM architecture that enables the system to perform Built-In Self-Test operations autonomously. The self-test circuit generates test input vectors, performs MAC operations with stored weights, and validates results without requiring external testing equipment, thereby maintaining energy efficiency while adding reliability through self-diagnosis capability.
Solution Approach 2:
The CIM macro is divided into functional segments including a self-test circuit, weight storage array, and computation units. This segmentation allows the self-test functionality to be integrated alongside the computational elements, enabling BIST capability without compromising the energy-efficient architecture.
3Reliability
If traditional testing methods are used, then testing can be performed, but test coverage is insufficient and test time is long
Solution Approach 1:
The self-test circuit pre-generates comprehensive test input vectors and stores them in the input array before execution. This preliminary preparation enables the system to perform exhaustive testing of all MAC operation pathways without requiring lengthy external test sequences, achieving high test coverage rapidly.
Solution Approach 2:
The testing process continuously utilizes the CIM macro's computational resources by performing MAC operations with test vectors and stored weights without interruption. The analog computing nature allows parallel evaluation of multiple test cases, maintaining continuous useful action throughout the test sequence and minimizing total test time.
Data Source
AI summary
Performing a built-in self-test (BIST) on a memory macro includes generating a plurality of input vectors. One input vector is transmitted to the memory macro in each of a plurality of cycles. Each of the plurality of input vectors is associated with a bit width. Generating the input vector includes generating a partial input vector of half the bit width and transmitting the partial input vector to each of a first half of the memory macro and a second half of the memory macro. The method also includes receiving, in each of the plurality of cycles, an output data from the memory macro, such that the output data is generated by the memory macro in response to processing the partial input vector, comparing the output data with a signature value, and determining whether the memory macro is normal or faulty based upon the comparison.