Built-In Self-Test Analog Circuitry Using Direct Digital Synthesizer
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Solution Overview
Problem
Analog functionality testing in mixed signal systems and high-speed RFICs is a time-consuming and costly process due to the lack of automated testing methods, with current techniques being expensive and inefficient in performing rigorous tests such as frequency response, linearity, and noise measurements.
Innovation Solution
A built-in-self-test (BIST) scheme utilizing a direct digital synthesizer (DDS) as a test pattern generator and a multiplier-accumulator pair as an output response analyzer, capable of generating various test waveforms and performing precise measurements without the need for external test equipment, integrated into ASICs or FPGAs for on-chip, in-system, or manufacturing testing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If manual analog testing methods are used, then testing coverage can be comprehensive, but testing time and cost increase significantly
Solution Approach 1:
The patent implements Built-In Self-Test (BIST) circuitry that enables the device to test itself automatically without external test equipment. The analog test circuit generates test signals and analyzes responses internally, eliminating the need for manual testing operations while maintaining comprehensive analog functionality coverage including frequency response, linearity, and noise measurements.
Solution Approach 2:
The patent replaces manual mechanical testing processes with automated digital signal processing. A direct digital synthesizer generates test waveforms and a digital signal processor analyzes the analog circuit responses, substituting the mechanical/manual testing system with an automated electronic testing system that reduces testing time while maintaining measurement precision.
2Adaptability or versatility
If traditional AC characterization approaches are integrated, then frequency-domain testing capability is achieved, but device complexity and area overhead increase
Solution Approach 1:
The patent integrates multiple testing functions into a unified BIST architecture. The same direct digital synthesizer and digital signal processor are used for various analog measurements including frequency response, linearity, and noise testing, eliminating the need for separate dedicated circuits for each test type and reducing overall device complexity.
Solution Approach 2:
The patent combines the test signal generation, analog circuit under test, and response analysis functions into a single integrated testing system. The direct digital synthesizer, analog-to-digital converter, and digital signal processor are merged into one cohesive BIST architecture that performs frequency-domain testing without requiring separate external equipment.
3Measurement precision
If on-chip sine wave generation is implemented, then frequency precision is improved, but area overhead and circuit complexity increase
Solution Approach 1:
The patent uses a direct digital synthesizer that generates test waveforms by copying and processing digital data sequences. Instead of using complex analog oscillators, the system stores digital representations of sine waves in memory and converts them to analog signals, achieving high frequency precision with reduced area overhead compared to traditional analog oscillation circuits.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables efficient and precise analog functionality testing, calibration, and compensation, reducing testing costs and time by providing accurate measurements of frequency response, gain, linearity, and signal-to-noise ratio, while minimizing area overhead and requiring minimal additional circuitry.
Implementation Method 1
The BIST scheme utilizes a built-in direct digital synthesizer (DDS) as the test pattern generator that can generate various test waveforms
Implementation Method 2
The multiplier extracts the spectrum information at the desired frequency without using Fast Fourier Transform (FFT)
Implementation Method 3
the accumulator picks up the DC component by averaging the multiplier output
Data Source
AI summary
A built-in-self test (BIST) scheme for analog circuitry functionality tests such as frequency response, gain, cut-off frequency, signal-to-noise ratio, and linearity measurement. The BIST scheme utilizes a built-in direct digital synthesizer (DDS) as the test pattern generator that can generate various test waveforms such as chirp, ramp, step frequency, two-tone frequencies, sweep frequencies, MSK, phase modulation, amplitude modulation, QAM and other hybrid modulations. The BIST scheme utilizes a multiplier followed by an accumulator as the output response analyzer (ORA). The multiplier extracts the spectrum information at the desired frequency without using Fast Fourier Transform (FFT) and the accumulator picks up the DC component by averaging the multiplier output.