BIST Circuitry Memory Pointer Segmentation for IC Testing Speed
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The existing methods for testing integrated circuits (ICs) are inefficient due to reliance on external test buses, which are slow, limiting the speed of defect detection and identification in complex ICs.
Innovation Solution
The integration of BIST circuitry within the IC, coupled with read-write memory and an external test bus interface, allows for the identification of a good data block, storing multiple pointers to it, and conducting tests on other circuitry, thereby reducing reliance on external test devices and increasing testing speed.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If external test bus is used for loading test data and reading test results, then testing completeness is maintained, but testing speed is limited
Solution Approach 1:
The patent segments the testing process by dividing test data into multiple blocks and using multiple pointers to different data blocks within the read-write memory. This allows parallel testing operations and reduces the time required to load and read test data compared to sequential external bus operations.
Solution Approach 2:
The patent introduces read-write memory with multiple data blocks as an intermediary between the external test bus and the BIST circuitry. Test data is loaded into this intermediate memory structure, allowing faster access and processing during testing operations without constantly using the slow external bus.
2Reliability
If multiple pointers to good data block are stored, then testing reliability is improved, but memory usage increases
Solution Approach 1:
The read-write memory serves multiple functions: it stores test data, stores multiple pointers to good data blocks, and acts as an intermediate buffer. This multi-functionality allows the system to maintain high reliability through multiple pointers without requiring separate dedicated memory structures.
Solution Approach 2:
The patent stores multiple instances of pointers to the same good data block. This excessive action (storing more pointers than strictly necessary) increases reliability by providing redundancy, allowing the system to tolerate some memory failures while still maintaining access to valid test data.
Data Source
AI summary
An integrated circuit (IC), a method of testing an IC and a method of reading test results from an IC containing built-in self-test (BIST) circuitry. In one embodiment, the IC includes: (1) an external test bus interface, (2) read-write memory coupled to the external test bus interface, (3) other circuitry and (4) BIST circuitry, coupled to the external test bus interface, the read-write memory and the other circuitry and configured to test the read-write memory to identify a good data block therein, store in a predetermined data block in the read-write memory multiple instances of a pointer to the good data block, conduct a test of at least the other circuitry and store at least some results of the test in the good data block.