Electronic Circuit Testing TRIZ Cases
- Semiconductor Transport Fixture Retaining Latch and Pitch Adapter
A semiconductor transport fixture uses a retaining latch to secure integrated circuits during handling.
- Temperature Control Apparatus Merging Fluid Paths
Merging high and low temperature fluids via a single valve reduces system complexity while maintaining precise temperature control.
- Scan Flip-Flop Circuit Reducing Clock Tree Power
A scan flip-flop circuit generates delayed complementary signals to minimize clock tree load.
- Prober Probe Head Automatic Replacement Mechanism
A prober uses a moving device to automatically replace the probe head while holding it via vacuum attraction.
- Integrated Circuit Signal Interface Controller for Diagnostic Multiplexing
Shared pin interfaces reduce silicon area and power consumption by eliminating dedicated debug traces.
- Built-In Self-Test Controller for Phase-Independent Time Domain Testing
A built-in self-test controller generates noise and recovered signals to calculate performance metrics directly in the time domain.
- Multi-Core BIST Testing via Segmented Debug Ports
Segmenting debug ports allows concurrent testing of heterogeneous memory blocks, reducing latency while maintaining secure access through authentication.
- Array Substrate Testing Device Synchronous Parallel Operation
A testing device uses multiple testers to perform electrical stress and power-on tests simultaneously on array substrates.
- Test Carrier Wiring with Dual Resistance for Pin Count Scaling
A test carrier uses distinct wiring portions with varying resistance values to manage signal output and reduce power consumption.
- On-Chip Debug Circuit for Asynchronous Signal Sampling
An on-chip debug circuit reconstructs asynchronous signals via dynamic triggering, avoiding invasive probing while maintaining measurement precision.
- Pipeline SOC Tester Using Sequential Test Bed Movement
A pipeline tester moves test beds through sequential stations to perform concurrent electrical tests on system-on-a-chip devices.
- BIST Circuitry Memory Pointer Segmentation for IC Testing Speed
Built-in self-test circuitry stores multiple pointers to good data blocks within read-write memory to accelerate integrated circuit defect detection.
- Low Power Scan Flip-Flop Cell Maintaining Q Output
A low power scan flip-flop cell maintains the Q output signal at a predetermined level during scan mode to prevent unnecessary switching of combinational logic.