Bit Deskewing Clock Recovery for High-Speed Parallel I/O
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Solution Overview
Problem
Current data transfer methods, both serial and parallel I/O interfaces, face challenges in synchronization due to signal jitter and skew, leading to increased complexity and bandwidth overhead, particularly in achieving high data rates without introducing noise and pin count increases.
Innovation Solution
A bit-deskewing method and system that aligns the sampling clock for both strobe and data signals using forward strobe clock recovery and data bit clock recovery circuits, allowing the data bit sampling clock to track the forward strobe sampling clock, thereby improving sampling accuracy and reducing errors without the complexity of encoding bandwidth overhead.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If per-line closed-loop timing with clock recovery is used in serial links, then sampling accuracy is improved, but bandwidth overhead and complexity increase due to encoding requirements
Solution Approach 1:
The patent extracts the clock signal from the data stream by using the data transitions themselves to generate the sampling clock, rather than embedding clock information within the data stream as in traditional serial links. This eliminates the need for complex encoding schemes like 8B/10B while maintaining accurate clock recovery and sampling timing.
Solution Approach 2:
The data signal serves dual purposes: both transmitting information and generating the sampling clock. The transitions in the data stream are used to drive the sampling clock, making the data signal itself the clock source rather than requiring a separate clock embedding mechanism.
2Speed
If source-synchronous timing with strobe signal is used in parallel links, then data transfer rate is improved, but trace impedance and length matching requirements increase complexity
Solution Approach 1:
The patent eliminates the separate strobe signal by extracting clock information directly from the data transitions. Each data line generates its own sampling clock from its own transitions, removing the need for separate strobe routing and the associated impedance and length matching requirements.
3Measurement precision
If per-bit de-skew with individual strobe delays is implemented, then sampling accuracy is improved, but noise from strobe distribution increases
Solution Approach 1:
The patent removes the noisy strobe distribution network by extracting clock signals directly from each data line's transitions. Each receiver generates its own sampling clock locally from the incoming data signal, eliminating the need to distribute strobe signals across the circuit board and the noise associated with that distribution.
4Reliability
If strobe signal is transmitted across circuit board, then synchronization is achieved, but pin count and cost increase
Solution Approach 1:
The data signal performs the dual function of both data transmission and clock synchronization. The transitions in the data stream itself provide the timing information, eliminating the need for separate strobe pins and reducing the overall pin count required for synchronized parallel communication.
Data Source
AI summary
An IO method and system for bit-deskewing are described. Embodiment includes a computer system with multiple components that transfer data among them. In one embodiment, a system component receives a forward strobe signal and multiple data bit signals from a transmitting component. The receiving component includes a forward strobe clock recovery circuit configurable to align a forward strobe sampling clock so as to improve sampling accuracy. The receiving component further includes at least one data bit clock recovery circuit configurable to align a data bit sampling clock so as to improve sampling accuracy, and to receive a signal from the forward strobe clock recovery circuit that causes the data bit sampling clock to track the forward strobe sampling clock during system operation.