Bit-Deskewing I/O with Strobe-Tracked Clock Recovery
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Solution Overview
Problem
Current data transfer methods, both serial and parallel, face challenges in synchronization due to signal jitter and skew, leading to increased complexity and bandwidth overhead, particularly in achieving high data rates without introducing noise and increasing costs.
Innovation Solution
A bit-deskewing IO method and system that aligns the sampling clock with the forward strobe signal and data bit signals using clock recovery circuits, allowing the data and strobe to track each other, reducing jitter and eliminating the need for complex encoding and tight impedance matching.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If per-line closed-loop timing with clock recovery is used in serial links, then data synchronization is improved, but bandwidth overhead and complexity increase due to encoding requirements
Solution Approach 1:
The patent extracts the clock signal from the data stream and transmits it separately as a dedicated strobe signal. This allows the data to be transmitted without complex encoding schemes like 8B/10B, eliminating the bandwidth overhead while maintaining synchronization through the separate clock path
Solution Approach 2:
The transmission is segmented into separate data paths and clock paths. Each data bit has its own timing reference from the strobe signal, allowing independent optimization of data encoding without clock recovery complexity
2Measurement precision
If tight impedance and length matching is applied across data and strobe traces, then sampling accuracy is improved, but manufacturing complexity and cost increase
Solution Approach 1:
The patent applies different impedance values to different trace groups: data traces have one impedance value while strobe traces have a different impedance value. This local differentiation allows each signal type to be optimized for its specific requirements without requiring all traces to match a single impedance value, simplifying manufacturing
Solution Approach 2:
The patent changes the impedance parameter differently for strobe traces compared to data traces. By allowing impedance to vary by signal type rather than requiring uniform impedance across all traces, the system achieves accurate sampling without the manufacturing complexity of tight impedance matching
3Measurement precision
If per-bit deskew with individual strobe delays is implemented, then timing alignment is improved, but noise from strobe distribution increases
Solution Approach 1:
The patent adds a dimensional separation by providing dedicated strobe signals for different data groups (e.g., separate strobes for byte 0 and byte 1). This dimensional organization allows timing alignment for each group while isolating the noise from each strobe distribution path, preventing noise accumulation
4Productivity
If strobe signals are transmitted across circuit boards for parallel links, then data rate is improved, but jitter and noise increase reducing timing budget
Solution Approach 1:
The patent segments the data transmission into multiple independent channels, each with its own dedicated strobe signal. This segmentation allows parallel transmission at high data rates while each channel maintains its own timing reference, preventing jitter accumulation and preserving the timing budget
Data Source
AI summary
An IO method and system for bit-deskewing are described. Embodiment includes a computer system with multiple components that transfer data among them. In one embodiment, a system component receives a forward strobe signal and multiple data bit signals from a transmitting component. The receiving component includes a forward strobe clock recovery circuit configurable to align a forward strobe sampling clock so as to improve sampling accuracy. The receiving component further includes at least one data bit clock recovery circuit configurable to align a data bit sampling clock so as to improve sampling accuracy, and to receive a signal from the forward strobe clock recovery circuit that causes the data bit sampling clock to track the forward strobe sampling clock during system operation.