Bit Line Driver Bias Voltage Generator for Non-Volatile Memory
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Solution Overview
Problem
Existing bit line drivers in non-volatile memory devices face challenges in maintaining the correct bias voltage magnitude due to process and temperature variations, leading to potential power consumption issues and incorrect operation signals.
Innovation Solution
A bias voltage generator and pre-charging circuit combination is introduced to generate and apply a stable bias voltage to bit line drivers, using a current mirror circuit and comparator to track threshold voltage variations and quickly charge the bias node, ensuring proper operation across different conditions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a conventional bit line driver is used without a bias voltage generator, then the device complexity is reduced, but the voltage level accuracy deteriorates due to process and temperature variations
Solution Approach 1:
The bias voltage generator pre-establishes accurate reference voltage levels before the actual bit line driving operation. By preparing the correct voltage biases in advance through the current mirror circuit and comparator, the system ensures that subsequent operations start from an accurate voltage baseline, compensating for process and temperature variations before they affect performance.
Solution Approach 2:
The bias voltage generator acts as an intermediary component between the power supply and the bit line driver. It introduces intermediate voltage reference nodes that mediate the voltage levels applied to the bit line, ensuring accurate voltage transmission while isolating the main driver circuit from the effects of process and temperature variations.
2Reliability
If the bias voltage magnitude is not accurately maintained, then the device complexity is reduced, but power consumption increases and incorrect operation signals occur
Solution Approach 1:
The comparator in the bias voltage generator provides feedback control by continuously monitoring the voltage levels and adjusting the current mirror circuit to maintain accurate bias voltages. This feedback mechanism ensures that voltage levels remain within correct ranges, preventing incorrect operation signals and reducing power consumption caused by voltage mismatches.
Solution Approach 2:
The patent replaces complex mechanical or manual voltage adjustment mechanisms with an electronic current mirror circuit and comparator system. This substitution provides automatic, continuous voltage level maintenance through electronic feedback control, improving reliability while keeping the device complexity manageable through integration.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution maintains accurate voltage levels on bit lines during both active and null operations, reducing power consumption and preventing incorrect operation signals, thus ensuring reliable bit line driver performance despite process and temperature variations.
Implementation Method 1
using a current mirror circuit and comparator to track threshold voltage variations
Implementation Method 2
using a current mirror circuit and comparator to track threshold voltage variations
Implementation Method 3
pre-charging circuit combination is introduced to generate and apply a stable bias voltage
Data Source
AI summary
An integrated circuit bit line driver system includes a plurality of bit line drivers coupled to respective bit lines of an array of non-volatile memory cells. Each of the bit line drivers includes a bias transistor through which an input signal is coupled to the respective bit line. The bit line driver system includes a bias voltage circuit that generates a bias voltage that is coupled to the respective gates of the bias transistors. The bias voltage circuit initially accelerates the charging of the transistor gates, and subsequently completes charging the gates at a slower rate. The bias voltage is generated using a diode-coupled transistor having electrical characteristics the match those of the bias transistors so that the bias voltage varies with process or temperature variations of the integrated circuit in the same manner as the threshold voltage of the bias transistors vary with process or temperature variations.