Bit Line Pre-charge Voltage Adjustment for NAND Flash Memory
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Solution Overview
Problem
Current NAND flash memory devices face challenges in efficiently determining the threshold voltage of memory cells, leading to potential overcharge and erroneous data storage due to varying charging speeds of bit lines during writing and reading operations.
Innovation Solution
The implementation of a selective pre-charge process and overdrive operation for bit lines, where the charging speed is adjusted based on sensing results, allows for precise control of bit line voltage and prevents overcharge, ensuring accurate threshold voltage determination.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a standard pre-charge operation is applied to all bit lines, then the charging process is simple and uniform, but it causes overcharge in some bit lines leading to erroneous data storage
Solution Approach 1:
The patent applies different pre-charge voltages to different bit lines based on their specific charging characteristics. The control circuit determines the threshold voltage of each memory cell by performing sensing operations during pre-charge, and adjusts the pre-charge voltage for each bit line individually to prevent overcharge, thereby improving data storage accuracy without requiring complete system redesign.
Solution Approach 2:
The patent performs sensing operations during the pre-charge phase to determine the threshold voltage of memory cells before the actual read or write operations. This preliminary determination allows the system to adjust pre-charge parameters in advance, preventing overcharge issues before they occur and ensuring reliable data storage.
2Speed
If the pre-charge voltage is increased to speed up charging, then the charging speed improves, but it increases the risk of overcharge and erroneous data storage
Solution Approach 1:
The patent dynamically adjusts the pre-charge voltage for each bit line based on real-time sensing results during the pre-charge operation. The control circuit modifies the charging parameters on-the-fly to optimize charging speed while preventing overcharge, allowing the system to achieve fast charging without compromising data storage accuracy.
Solution Approach 2:
The patent implements a feedback mechanism where the control circuit performs sensing operations during pre-charge to monitor the threshold voltage of memory cells. Based on this feedback, the system adjusts the pre-charge voltage to maintain optimal charging speed while preventing overcharge conditions that would lead to erroneous data storage.
3Reliability
If the threshold voltage determination is performed more accurately, then data storage reliability improves, but the operation time increases
Solution Approach 1:
The patent combines the pre-charge operation with the threshold voltage determination operation by performing sensing operations during the pre-charge phase. This merging of operations allows the system to determine threshold voltages accurately without adding separate time-consuming steps, as the sensing is integrated into the existing pre-charge timeline.
Solution Approach 2:
The patent maintains continuous useful action by performing sensing operations during the pre-charge phase rather than sequentially. The control circuit continuously monitors the bit line voltage and performs sensing operations throughout the pre-charge process, ensuring that threshold voltage determination is completed without interrupting or extending the overall operation time.
Data Source
AI summary
A memory device includes memory cells, word lines that are each connected to gates of a plurality of the memory cells, bit lines that are each connected to a plurality of the memory cells, and a control circuit configured to perform a determination operation on the memory cells. During the determination operation for a first memory cell among the memory cells, a first bit line connected to the first memory cell is charged using a bit line charge voltage, and the bit line charge voltage is adjusted based on a result of a first sensing operation that is performed on the first bit line. A second sensing operation is performed on the first bit line after the first sensing operation to determine whether a threshold voltage of the first memory cell is greater than a reference voltage.