Bit Line Voltage Supply Circuit for Leakage Current Reduction
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Solution Overview
Problem
Conventional methods for reducing leakage current in semiconductor memory devices during standby mode are ineffective in minimizing current consumption without deteriorating device performance, particularly in battery-operated systems.
Innovation Solution
A bit line voltage supply circuit and method that control the precharge voltage of bit lines to an optimal level for standby and operational modes, applying a lower standby voltage during standby and switching to the operating voltage when the device enters operational mode, using a bit line voltage switch and controller to manage these voltage levels.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a supply voltage Vdd is applied to bit lines during standby mode to maintain data storage, then data retention is ensured, but leakage current increases significantly
Solution Approach 1:
The patent implements dynamic voltage switching for bit lines based on operational mode. During standby mode, a first voltage (lower than Vdd) is applied to bit lines to minimize leakage current while maintaining data retention. During active mode, the voltage is switched to the full supply voltage Vdd to enable normal memory operations. This dynamic voltage adjustment resolves the contradiction between data retention and leakage current reduction.
Solution Approach 2:
The patent changes the voltage parameter applied to bit lines depending on the operational state. A voltage switch circuit controlled by a mode signal selects between two voltage levels: a reduced voltage during standby to minimize leakage, and full Vdd during active operations. This parameter change approach allows the system to optimize between data retention and power consumption based on operational requirements.
2Use of energy by moving object
If the bit line voltage is reduced during standby mode to reduce leakage current, then power consumption decreases, but the transition time to operational mode increases
Solution Approach 1:
The patent applies a preliminary voltage level during standby mode that is optimized for low leakage current while still maintaining data integrity. This pre-configured voltage state allows for faster transition to full operational voltage compared to completely discharging or maintaining Vdd during standby. The preliminary voltage action reduces wake-up time while achieving power savings.
3Use of energy by moving object
If a voltage switch circuit is added to control bit line voltage levels, then leakage current is reduced, but device complexity increases
Solution Approach 1:
The voltage switch circuit is designed to serve multiple functions: it controls bit line voltage during standby mode to reduce leakage, manages voltage transitions during mode switching, and works integration with existing memory cell structures. By making the switch circuit multi-functional, the patent reduces the need for additional separate circuits, thereby limiting the increase in overall device complexity while achieving leakage current reduction.
Data Source
AI summary
There is provided a bit line voltage supply circuit for reducing leakage current flowing from bit lines to a memory cell without substantially deteriorating the performance of a semiconductor memory device. A bit line voltage switch applies a first supply voltage to a bit line pair in response to a first switch control signal, and applies a second supply voltage having a lower voltage than the first supply voltage to the bit line pair in response to a second switch control signal. A bit line voltage controller controls the first and second switch control signals so that the second supply voltage is supplied to the bit line pair during a standby mode, and the first supply voltage is supplied to the bit line pair when the semiconductor memory device changes from the standby mode to an operational mode for a predetermined time period.