Bit Pulse Sampling Synchronization for Bus Transmission Errors

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Solution Overview

Problem

Inaccuracies in bit sequence transmission occur due to different signal propagation times and non-ideal pulse shapes in bus systems, leading to transmission errors, especially when sampling is done before the signal is fully present or has decayed.

Innovation Solution

A method that samples a bit sequence with a higher sampling frequency to identify stable sampling points within bit pulses, assigns values based on edge detection, and synchronizes the transmission with these points to reduce error rates, using multiple samplings of a test sequence to establish reliable statistics and determine the center sampling point for optimal synchronization.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If sampling is performed at a fixed phase without synchronization, then the sampling process is simple, but transmission errors increase due to signal propagation time variations and non-ideal pulse shapes

Engineering Contradiction:
Improvetransmission error rateVSAvoidsynchronization mechanism complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent performs preliminary sampling of at least one bit pulse at multiple sampling phases before actual data transmission. This preliminary action identifies the optimal sampling phase where the signal is most stable, which is then used for synchronizing subsequent data sampling. This resolves the contradiction by establishing reliable sampling parameters in advance, reducing transmission errors without requiring complex real-time synchronization mechanisms.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent varies the sampling phase parameter across multiple preliminary sampling operations to identify the optimal phase. By changing the sampling timing parameter and evaluating signal stability at each phase, the system determines the best sampling point. This approach improves transmission reliability by selecting the most favorable sampling phase while keeping the overall system structure relatively simple.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If multiple bit pulses are sampled to improve statistics, then the reliability of identifying stable sampling points increases, but the time required for synchronization increases

Engineering Contradiction:
Improvesampling point identification accuracyVSAvoidsynchronization setup time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent samples a plurality of bit pulses, which may be more than the minimum single pulse, to improve statistical reliability in identifying stable sampling points. By examining multiple pulses, the system obtains a more accurate picture of signal behavior and identifies consistent optimal sampling phases. This excessive sampling action improves identification accuracy while the time overhead is accepted as a one-time synchronization cost.

Inventive Principle:
Principle #16Partial or excessive action

3Measurement precision

If the sampling frequency is increased to capture multiple sampling points within one bit pulse, then the precision of identifying stable regions improves, but the data processing load increases

Engineering Contradiction:
Improvesampling point precisionVSAvoiddata processing complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent divides the bit pulse into multiple discrete sampling points by using a sampling frequency higher than the bit frequency. This segmentation allows identification of specific sampling phases where the signal is stable versus where transitions occur. By processing individual sampling points separately and identifying stable regions, the system achieves precise sampling point selection while managing data processing through systematic evaluation of each point.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentEP1821448B1Method for synchronising the transfer of a bitstream
Publication Date: 2010.09.08 SICK STEGMANN
  • EP1821448B1 patent drawingFigure 1~2

AI summary

The method involves scanning a bit pulse in receiver with a sampling rate f2, which is larger than bit frequency f1 of bit string and assigning value zero to all scanning points. A flank of the bit pulse (M) is detected by determining the scanning point and value one is assigned to this scanning point. The bit string with synchronized bit frequency is scanned with a scanning point, to which the value zero is assigned. An independent claim is also included for a device for the execution of a method.