Bit-Spreading Memory Layout for Radiation-Hardened ECC Recovery
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Solution Overview
Problem
Memory systems in space-based applications suffer from high radiation-induced single-bit, multi-bit, and single event functional interrupt errors, rendering them non-functional, and existing solutions like shielding and redundant memories are impractical due to weight or cost constraints.
Innovation Solution
A bit spreading technique distributes data bits and error correction codes across multiple separated RAMs, allowing for error correction and recovery even if a single RAM is affected by radiation, reducing the likelihood of multiple bits being impacted simultaneously.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If shielding is used to reduce radiation exposure, then reliability is improved, but weight increases significantly
Solution Approach 1:
The patent divides a single data word into multiple smaller units called sub-words, where each sub-word is stored in a separate RAM. This segmentation ensures that even if radiation affects one RAM, the other sub-words remain intact, providing error correction without requiring heavy shielding.
2Reliability
If redundant memories with majority voting are used, then reliability is improved, but cost and complexity increase
Solution Approach 1:
Instead of using redundant copies of entire memory words with majority voting logic, the patent segments each word into sub-words stored in separate RAMs. This reduces the complexity of error correction by eliminating the need for majority voting circuits while still providing protection against radiation-induced errors.
Solution Approach 2:
The patent uses error correction codes that are distributed across multiple RAMs rather than creating full redundant copies of data. This approach provides error correction functionality without the complexity and cost of complete redundancy systems.
3Reliability
If ECC schemes are used, then error correction is improved, but they cannot effectively handle multi-bit and SEFI errors
Solution Approach 1:
The patent segments data into sub-words stored in separate RAMs, which fundamentally changes how errors are handled. This segmentation approach can detect and correct multi-bit errors and single event functional interrupts because even if one RAM is completely corrupted, the other sub-words provide the information needed for recovery.
Data Source
AI summary
Techniques are provided for an error resistant radiation hardened memory system based on spreading of data bits among multiple random access memories (RAMs). A memory system implementing the techniques according to an embodiment includes a first plurality of RAMs configured to store data bits written to the memory system, the data bits distributed over the first plurality of RAMs. The system also includes an error correction coding (ECC) circuit configured to generate ECC codes, each of the codes associated with a unique group of the data bits. The system further includes a second plurality of RAMs configured to store bits of the ECC codes such that the bits of each ECC code are distributed over the second plurality of RAMs. The system further includes a reporting circuit configured to report a single bit error correction or a double bit error detection, resulting from a read operation on the memory system.