Bitline Bias Circuit for NOR Flash Memory Voltage Stability

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Conventional bitline bias circuits in NOR flash memory devices face challenges in stably supplying a bias voltage near the power voltage to bitline bias transistors, leading to increased power consumption due to leakage current and instability in voltage supply, especially when the power voltage decreases.

Innovation Solution

A bitline bias circuit is designed with a high voltage generating circuit, a voltage divider circuit, a comparator, and a driver using high voltage transistors to stabilize the bias voltage supply, including a pulse generating circuit that operates the bitline bias circuit in response to a pump enable signal to minimize current consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a conventional bitline bias circuit is always operated to provide a constant bias voltage, then the bias voltage stability is improved, but the power consumption increases due to leakage current

Engineering Contradiction:
Improvebias voltage stabilityVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSLoss of energy

Solution Approach 1:

The bitline bias circuit is operated periodically based on the pump enable signal rather than continuously. The control logic activates the bitline bias circuit only during specific operation phases (read, verify, program) when bias voltage is needed, and deactivates it during idle periods, thereby reducing leakage current while maintaining voltage stability when required

Inventive Principle:
Principle #19Periodic action

2Loss of energy

If the power voltage applied to the bitline bias circuit is decreased, then the power consumption is reduced, but the bias voltage applied to the bitline bias transistor is also decreased leading to instability

Engineering Contradiction:
Improvepower consumptionVSAvoidbias voltage stability
Core Design Contradiction:
Loss of energyVSReliability

Solution Approach 1:

The circuit uses high voltage transistors that can operate with higher voltage tolerance to generate a stable bias voltage even when the power voltage is reduced. The high voltage transistors maintain proper transistor operation and bias voltage output across a wider voltage range, ensuring stability despite lower power supply conditions

Inventive Principle:
Principle #35Parameter changes

3Reliability

If a voltage close to the power voltage is supplied to the bitline bias transistor, then the voltage stability is improved, but it is difficult to stably supply due to transistor characteristics

Engineering Contradiction:
Improvebias voltage stabilityVSAvoidcircuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

A dedicated bitline bias circuit acts as an intermediary between the power voltage source and the bitline bias transistor. This intermediate circuit uses high voltage transistors and control logic to properly regulate and stabilize the bias voltage, making it easier to supply a stable voltage close to the power voltage without directly connecting the transistor to the power source

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS7656714B2Bitline bias circuit and nor flash memory device including the bitline bias circuit
Publication Date: 2010.02.02 SAMSUNG ELECTRONICS CO LTD
  • US7656714B2 patent drawing
  • US7656714B2 patent drawing
  • US7656714B2 patent drawing

AI summary

The NOR flash memory device according to the present invention is operated by a high voltage supplied from bitline selection transistors and includes a bitline bias circuit for supplying a bias voltage of a constant level to the bitline bias transistor. In accordance with the present invention, it is possible to stably supply a desired voltage closing to a power voltage to the bitline bias transistor.