Bitonic Sort Majority Circuit for Small-Area Vote Accuracy
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Solution Overview
Problem
The existing majority circuits face challenges with scalability and energy efficiency as the input value range and number increase, making it difficult to mount a majority circuit with a small area without using an adder circuit, and inherent transistor variations affect the accuracy of majority vote operations.
Innovation Solution
The majority circuit employs a bitonic sort circuit to round the sum of input signals to a power of 2, simplifying the processing of majority functions and allowing for efficient operation with large input values and numbers while maintaining a small mounting area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If an adder circuit is used to implement majority function, then the majority vote operation can be realized, but the mounting area increases and scalability decreases as input value range and number increase
Solution Approach 1:
The patent segments the majority function implementation into two parts: a bitonic sort circuit for sorting input signals and a simple comparator for determining the majority value. This segmentation replaces the traditional adder circuit with smaller, more scalable components that maintain functionality while reducing area requirements.
Solution Approach 2:
The patent substitutes the mechanical adder circuit with an analog-based bitonic sort circuit that uses voltage comparisons and sorting mechanisms. This substitution leverages analog signal processing properties to achieve the same computational result with reduced hardware footprint.
2Area of stationary object
If transistor size W/L is decreased to reduce area, then mounting area decreases, but current variation increases affecting majority vote accuracy
Solution Approach 1:
The patent extracts the sorting functionality from the adder circuit and implements it separately using the bitonic sort circuit. This extraction allows the use of smaller transistors in the sort circuit where current variation has less impact on the final majority determination, which is performed by a simple comparator.
Solution Approach 2:
The bitonic sort circuit performs preliminary sorting and organization of input signals before the final majority comparison. This beforehand processing cushions against the effects of transistor variations by ensuring that the critical comparison stage operates on already-sorted, stabilized voltage levels.
3Adaptability or versatility
If the number of input signals increases to handle larger input value range, then the majority function capability improves, but the circuit complexity and mounting area increase
Solution Approach 1:
The bitonic sort circuit is a universal sorting network that can handle any number of input signals by following a standardized expansion pattern. This multi-functional approach allows the same circuit topology to process varying numbers of inputs without requiring fundamentally different circuit designs, thereby managing complexity systematically.
Solution Approach 2:
The bitonic sort circuit organizes inputs in a multi-dimensional hierarchical structure with multiple sorting stages. This dimensional organization allows the circuit to scale to handle larger numbers of inputs by adding stages rather than increasing complexity within a single stage, improving adaptability while managing complexity.
Data Source
AI summary
An object of the invention is to provide a majority circuit which may be manufactured cheaply and easily and may process necessary majority functions for calculation in an interaction model. The majority circuit according to the invention simplifies the processing of the majority function by using a bitonic sort circuit to round the sum of input signals to a power of 2.