BJT Array Structure for Scaled RRAM Access Transistors
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Solution Overview
Problem
The scalability of resistive random-access memory devices is restricted due to minimum voltage and drive current requirements for field-effect transistors, limiting the ability to shrink bitcell dimensions.
Innovation Solution
A structure comprising an array of bipolar junction transistors with trench isolation regions and alignment structures, where the base layers extend through a dielectric layer to connect collectors and emitters, allowing for compact design and eliminating the need for field-effect transistors as access transistors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If field-effect transistors are used as access transistors in RRAM devices, then reliable operation can be achieved, but the minimum voltage and drive current requirements restrict the ability to shrink bitcell dimensions
Solution Approach 1:
The patent changes the transistor type from field-effect to bipolar junction transistor, fundamentally altering the electrical parameters (voltage and current requirements) to enable smaller bitcell dimensions while maintaining reliable operation
Solution Approach 2:
The bipolar junction transistor is segmented into distinct functional regions (emitter, base, collector) with specific doping profiles, allowing independent optimization of each region to achieve both reliability and size reduction
2Length of moving object
If bipolar junction transistors are used in RRAM devices, then bitcell dimensions can be scaled down, but the fabrication process becomes more complex
Solution Approach 1:
The substrate is pre-doped to form the collector regions before transistor fabrication, and the dielectric layer is pre-formed to define the base layer thickness, simplifying subsequent processing steps
Solution Approach 2:
The base layer is formed within the dielectric layer, creating a nested structure where the transistor components are integrated within the existing layer architecture, reducing overall device complexity
Data Source
Figure 1
Figure 2~2A
Figure 3~3A
AI summary
Structures that include bipolar junction transistors and methods of forming such structures. The structure comprises a semiconductor layer, a substrate (32), and a dielectric layer disposed between the semiconductor layer and the substrate. The structure further comprises a first bipolar junction transistor (12) including a first collector in the substrate (34), a first emitter (40), and a first base layer (20). The first base layer extends through the dielectric layer from the first emitter to the first collector. The structure further comprises a second bipolar junction transistor (14) including a second collector (34) in the substrate, a second emitter (42), and a second base layer (22). The second base layer extends through the dielectric layer from the second emitter to the second collector. The second base layer is connected to the first base layer by a section of the semiconductor layer to define a base line.