Block-Based Dynamic Voltage Stress Wafer Testing With Adaptive Voltages
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Solution Overview
Problem
Current DVS tests apply a fixed voltage to all blocks of a die, failing to optimize the testing process and resulting in high DPPM rates.
Innovation Solution
A dynamic voltage stress condition optimization method and system that selects individual testing blocks, acquires measurement temperatures, generates a correlation table, determines a target temperature, and applies adaptive DVS block voltages based on these temperatures to optimize the testing process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a fixed DVS voltage is applied to all blocks of a die, then the testing process is simple, but the DPPM rate is high and the testing is not optimized
Solution Approach 1:
The patent divides the die into multiple blocks and applies different DVS voltages to different blocks based on their individual characteristics. Each block receives a customized voltage stress level determined by its power consumption characteristics and temperature measurements, rather than applying a uniform voltage to the entire die. This localized approach optimizes defect detection for each specific block while maintaining overall system manageability.
Solution Approach 2:
The testing process is segmented into distinct phases: initial power-up sequence testing, temperature measurement during DVS flow, correlation table generation, and block-specific voltage application. The die is segmented into multiple independently testable blocks, each with its own temperature sensor and voltage control. This segmentation enables parallel processing and reduces the complexity of managing a single monolithic testing process.
2Reliability
If different voltages are applied to different blocks, then the DPPM rate is reduced and testing is optimized, but the device complexity increases
Solution Approach 1:
The system performs preliminary measurements during the DVS flow to capture temperature data from each block. These measurements are used to generate a correlation table that maps temperature characteristics to optimal DVS voltage levels. By preparing this mapping in advance, the system avoids complex real-time calculations during actual testing, reducing operational complexity while maintaining high reliability.
Solution Approach 2:
Each block contains its own temperature sensor that automatically measures its temperature during the DVS flow. The system uses these self-measured temperatures to determine the appropriate voltage for each block without requiring external intervention or complex measurement infrastructure. This self-service approach simplifies the testing system architecture while enabling precise, block-specific voltage optimization.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Improves the efficiency and accuracy of the DVS testing flow by adaptively applying different voltages to different blocks, reducing DPPM rates.
Implementation Method 1
acquiring a plurality of testing block measurement temperatures of the testing block when the testing block is processed by a DVS testing flow
Implementation Method 2
a DVS test can be applicable to sense process variations of critical layers, points, or weak layout patterns of a testing product
Data Source
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AI summary
A dynamic voltage stress, DVS, condition optimization includes selecting a testing block from a plurality of blocks in a die of a wafer (S801), acquiring a plurality of testing block measurement temperatures of the testing block when the testing block is processed by a DVS testing flow (S802), acquiring a correlation table of the plurality of testing block measurement temperatures and a plurality of DVS block predict temperatures of the testing block (S803), configuring a tip burnt block temperature according to the testing block measurement temperatures (S804), determining a DVS block target temperature selected from the DVS block predict temperatures according to the correlation table and the tip burnt block temperature (S805), and generating a DVS block voltage for applying to the testing block in the die of the wafer according to the DVS block target temperature (S806).