BMC Network Communication via PCIe-VDM and I2C Transport

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Solution Overview

Problem

Conventional Information Handling Systems (IHS) face challenges in efficiently managing network communications when the host processor is powered off, as existing solutions like RMII bus add complexity and require the IHS to be turned on for PCIe VDM to work, and using I2C for network packet transport is slow.

Innovation Solution

Implementing systems and methods that utilize PCIe-VDM and I2C transport for network communications, allowing the Baseboard Management Controller (BMC) to receive messages and power on the host processor when necessary, enabling communication via PCIe bus while skipping unnecessary boot procedures and entering a low-power state for efficient data transfer.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the IHS uses I2C bus for network packet transport when host processor is powered off, then network communication is enabled, but data transfer rate is insufficient

Engineering Contradiction:
Improvenetwork communication capabilityVSAvoiddata transfer rate
Core Design Contradiction:
ReliabilityVSSpeed

Solution Approach 1:

The system dynamically switches between I2C bus and PCIe-VDM based on power state and bandwidth requirements. When host processor is powered off, the system uses I2C bus for basic network communication. When host processor is powered on, the system switches to PCIe-VDM for high-speed data transfer, optimizing performance based on operational conditions.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The invention changes the operational parameters by evaluating pass-through data transfer rate thresholds and switching communication modes accordingly. The system monitors available bandwidth and transitions between communication protocols based on performance requirements, enabling adaptive optimization of data transfer rates.

Inventive Principle:
Principle #35Parameter changes

2Speed

If the IHS uses PCIe-VDM for network communication, then data transfer rate is improved, but the IHS must be turned on

Engineering Contradiction:
Improvedata transfer rateVSAvoidoperational flexibility
Core Design Contradiction:
SpeedVSEase of operation

Solution Approach 1:

The system provides dynamic operational flexibility by allowing network communication in both powered-off (I2C bus) and powered-on (PCIe-VDM) states. This enables the IHS to maintain network connectivity regardless of power state, improving ease of operation while preserving high-speed capability when needed.

Inventive Principle:
Principle #15Dynamics

3Reliability

If the BIOS boots up completely to enable PCIe-VDM communication, then communication capability is established, but boot time is increased

Engineering Contradiction:
Improvecommunication capabilityVSAvoidboot time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The BIOS boot process is segmented into essential and non-essential phases. The system performs minimal boot operations to enable PCIe-VDM communication, skipping unnecessary boot steps such as full OS initialization and graphical interface loading. This segmented approach establishes communication capability while minimizing boot time.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system performs preliminary actions by initializing only the essential components needed for PCIe-VDM communication before completing the full boot process. Critical hardware initialization and driver loading are performed in advance, allowing communication to begin without waiting for complete system boot-up.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS9940143B2Using peripheral component interconnect express vendor-defined message (PCIe-VDM) and inter-integrated circuit (I<sup>2</sup>C) transport for network communications
Publication Date: 2018.04.10 DELL PROD LP
  • US9940143B2 patent drawing
  • US9940143B2 patent drawing
  • US9940143B2 patent drawing

AI summary

Systems and methods for using Peripheral Component Interconnect Express Vendor-Defined Message (PCIe-VDM) and Inter-Integrated Circuit (I2C) transport for network communications are described. In some embodiments, an IHS may include: a host processor; a Basic Input/Output System (BIOS) coupled to the host processor; a Baseboard Management Controller (BMC) coupled to the host processor; and a memory coupled to the BMC, the memory having program instructions stored thereon that, upon execution, cause the BMC to: receive a message over a network while the host processor is powered off, wherein the message originates from a remote IHS and targets the BMC; and in response to a pass-through data transfer rate available to the BMC not meeting a threshold value: power on the host processor; request that the BIOS boot up; and perform a communication with the remote IHS via a PCIe bus using a PCIe-VDM supported by the host processor.