Power Supply For Data Processing TRIZ Cases
- Side Channel Signal Monitoring for Runtime Anomaly Detection
External monitoring via electromagnetic emanations reduces computational requirements by separating sub-channels to handle noisy signal patterns.
- Battery Energy Manager Voltage Thresholds Data Safety
A battery energy manager detects voltage levels to suspend system operations before critical power depletion occurs.
- Touch-Sensitive Display Dual-Electrode Capacitance Sensing
Separate mutual and self-capacitance electrode sets enable gesture detection while the display controller is off, reducing power consumption.
- I3C Repeater Isolates Mixed-Voltage Buses
An I3C Repeater translates transactions between I2C and I3C interfaces.
- SATA Power Control Unit for Apparatus Energy Efficiency
Power control unit links SATA component transitions with overall apparatus states, resolving insufficient energy efficiency from isolated component management.
- Dynamic Memory Power Management Using Lookup Table Bank Migration
A memory management unit migrates data between volatile memory banks using a lookup table to reduce sleep current during idle periods.
- Workload Determination via Supply Current Slope Analysis
A supply current monitor tracks average current to determine functional unit workload through slope calculation of the current-frequency relation.
- Silent Wakeup Logic for Remote Computer Access
Segmenting the wake process into partial and full states reduces noise and power consumption by isolating remote requests from local user interaction.
- Power Management Circuit Thermal Limit Control
A power management circuit dynamically adjusts processor power levels based on real-time battery voltage and current monitoring.
- Encryption Key Re-provisioning for Power State Transitions
A system re-provisions encryption keys to processor components after power state transitions to maintain media playback continuity.
- Heterogeneous Power Management for Data Center Servers
A controller configures computing resources using individual idle and peak power consumption metrics to optimize system performance.
- Power Control Mechanism for Archival Storage Enclosure
A power control mechanism selectively activates storage devices via a network cable to manage energy consumption.
- Battery Charging Mode Selection via Power Plug Strain Detection
Strain gauges in the power plug detect user actuation to switch between normal and fast charging, resolving speed versus battery life trade-offs.
- FDSOI Back Bias Placing and Routing via Standard Tap Well Cells
Standard tap well cells integrate bias wires with power rails, reducing routing complexity for FDSOI back bias implementation.
- Power Manager Circuitry Aggregate Load Profile Monitoring
Power manager circuitry aggregates server load profiles to prevent distribution unit overloads, applying optimal recovery delays to maintain uptime.
- Goal-Oriented Device Configuration for Battery Life Extension
Dynamic device settings adapt to power conditions and user goals, balancing battery conservation with task completion rates.
- Terminal AI Operation Management via Charging State Detection
A terminal detects its charging state to adaptively schedule artificial intelligence operations for optimized power usage.
- Code-Based Power Telemetry Side-Channel Leakage Mitigation
Inserts additional instructions into workload code to produce complementary power consumption profiles for system buses.
- BMC Network Communication via PCIe-VDM and I2C Transport
Baseboard Management Controller switches between I2C and PCIe-VDM to resolve data transfer rate bottlenecks when host processor is powered off.
- Peripheral Power Management for Authentication Devices
A control unit identifies connected peripherals to adjust their power saving states independently.
- Wireless Device Activation via Keyword Spotting and Identification Verification
Segmenting keyword detection from identification verification reduces false alarms and conserves battery life for co-located wireless devices.
- On-Die ROM Lookup Table for Processor P1 Frequency Determinability
A semiconductor chip stores multiple processor P1 frequencies in on-die non-volatile storage to optimize power state transitions.
- SSD Off-Time Tracker for Voltage Selection
An off-time tracker monitors power interruption duration to determine appropriate voltage settings upon SSD restart.