Selective Bond Pad Plating to Cut Palladium Use and Overetching
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Solution Overview
Problem
The increasing cost of palladium and the overetching of copper bond pads due to palladium use in semiconductor device fabrication lead to higher production costs and reliability issues.
Innovation Solution
A method involving selective plating of nickel and palladium or gold layers only on bond pads, while excluding conductor traces, reducing palladium usage and preventing overetching, thereby lowering costs and enhancing reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If palladium plating is used on bond pads, then reliability of wire bonds is improved, but production costs increase due to rising palladium costs
Solution Approach 1:
The patent applies selective plating to deposit palladium only on bond pads where it is needed for wire bonding, while excluding conductor traces. This local application maintains the reliability benefit of palladium plating while reducing overall palladium consumption and cost.
Solution Approach 2:
The patent segments the plating process into two distinct stages: first plating conductor traces with copper, then selectively plating bond pads with nickel and palladium. This segmentation allows precise control of palladium application locations, ensuring it is present only where required for bonding while absent from trace areas, thereby reducing material costs.
2Reliability
If palladium plating is used on bond pads, then bondability is improved, but overetching of copper bond pads occurs resulting in failures
Solution Approach 1:
The patent uses selective plating to create local quality differences: bond pads receive nickel and palladium layers for enhanced bondability, while conductor traces receive only copper plating. This localized approach ensures palladium is present only where bondability is needed, eliminating the overetching problem that occurs when palladium is present on traces.
Solution Approach 2:
The patent segments the plating process into sequential stages with different photoresist patterns. The first pattern plates conductor traces, then is removed. A second pattern selectively plates bond pads with nickel and palladium. This segmentation prevents palladium from being deposited on traces, thereby preventing the catalytic overetching of copper bond pads during subsequent etching operations.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Reduces palladium usage, prevents overetching of copper bond pads, and increases the reliability of wire bonds, leading to cost-effective and reliable semiconductor devices.
Implementation Method 1
A nickel and palladium plating system is often used. The nickel and palladium plating layers prevent copper diffusion and tarnish of the bond pads
Implementation Method 2
depositing a seed layer over a device side surface of a semiconductor substrate; depositing a first photoresist layer over the seed layer; patterning the first photoresist layer to form bond pad openings corresponding to bond pad positions and forming trace openings corresponding to conductor traces
Data Source
AI summary
A described example includes: a semiconductor die having a device side surface and an opposing backside surface, the backside surface mounted to a die pad of a lead frame, the lead frame comprising conductive leads spaced from the die pad; a conductor layer overlying the device side surface; bond pads including bond pad conductors formed in the conductor layer, a nickel layer over the bond pad conductors, and a palladium or gold layer over the nickel layer; conductor traces formed in the conductor layer, the conductor traces free from the nickel layer and the palladium or gold layer; bond wires bonded to the bond pads electrically coupling the bond pads to conductive leads; and mold compound covering the semiconductor die, the bond pads, the bond wires, and portions of the lead frame, wherein portions of the conductive leads are exposed from the mold compound to form terminals.