High-Via-Density Bond Pad Structure Against BSI Sensor Peeling
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Solution Overview
Problem
Backside illuminated (BSI) image sensors face challenges with inter-wire vias having low density between the top via level and the semiconductor substrate, leading to a weak columnar structure prone to peeling under shear force.
Innovation Solution
Increasing the via density at via levels between the top via level and the semiconductor substrate to more than 10%, which strengthens the columnar structure even with small wire thicknesses, reducing the likelihood of peeling and failure.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If via density is increased to more than 10% at via levels between the top via level and the semiconductor substrate, then the structural integrity of the columnar structure is enhanced, but the device complexity and manufacturing difficulty increase
Solution Approach 1:
The patent applies local quality by differentiating via density across different via levels. Specifically, via levels between the top via level and the semiconductor substrate have high via density (>10%), while the top via level has low via density. This localized differentiation strengthens the columnar structure where it is most needed (at the base) without unnecessarily complicating the entire via structure.
2Productivity
If wire thickness is reduced for further scaling down of IC chips, then the productivity and integration density improve, but the columnar structure becomes weaker and more prone to peeling
Solution Approach 1:
The patent changes the parameter of via density specifically at the lower via levels to compensate for reduced wire thickness. By increasing via density (>10%) at via levels between the top via level and the semiconductor substrate, the overall strength of the columnar structure is maintained even when wire thickness is reduced for scaling purposes.
3Strength
If high via density is implemented throughout all via levels, then the columnar structure strength is maximized, but the manufacturing complexity and process difficulty increase significantly
Solution Approach 1:
The patent applies local quality by differentiating via density across different via levels. Specifically, via levels between the top via level and the semiconductor substrate have high via density (>10%), while the top via level has low via density. This localized differentiation strengthens the columnar structure where it is most needed (at the base) without unnecessarily complicating the entire via structure.
Data Source
AI summary
Various embodiments of the present disclosure are directed towards an integrated circuit (IC) chip in which a bond pad structure extends to a columnar structure with a high via density. For example, an interconnect structure is on a frontside of a substrate and comprises a first bond wire, a second bond wire, and bond vias forming the columnar structure. The bond vias extend from the first bond wire to the second bond wire. The bond pad structure is inset into a backside of the substrate, opposite the frontside, and extends to the first bond wire. A projection of the first or second bond wire onto a plane parallel to a top surface of the substrate has a first area, and a projection of the bond vias onto the plane has a second area that is 10% or more of the first area, such that via density is high.


