Bond Wire Arrangement for Reducing Parasitic Capacitance
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Solution Overview
Problem
High-frequency signal transmission between galvanically isolated integrated circuits (ICs) is degraded by parasitic capacitance between bond wires, which can be significant when the parasitic capacitance is comparable to the capacitance of isolation capacitors, creating a signal leakage path that reduces the signal received by the receiver.
Innovation Solution
The bond wires are arranged to increase the effective distance between them, deviating from a parallel orientation by varying their distance by at least 10% along their length, and using different height profiles or lengths to reduce parasitic capacitance, and in some cases, incorporating inductors or balancing circuits to mitigate capacitance imbalances.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If bond wires are arranged in parallel to reduce material and manufacturing cost, then the amount of material required is reduced and manufacturing cost decreases, but parasitic capacitance between bond wires increases causing signal leakage
Solution Approach 1:
The bond wires are arranged asymmetrically rather than in a symmetric parallel configuration. The first bond wire extends from a first location to a second location, while the second bond wire extends from a third location to a fourth location, where the vertical spacing between wires varies along their lengths. This asymmetric arrangement reduces parasitic capacitance while maintaining electrical connectivity and signal transmission functionality.
Solution Approach 2:
The invention transitions from a two-dimensional parallel wire arrangement to a three-dimensional configuration where bond wires are positioned at different vertical heights. By varying the vertical spacing between wires along their lengths, the patent utilizes the third dimension (vertical axis) to reduce parasitic capacitance while maintaining horizontal connectivity for signal transmission.
2Reliability
If bond wires are arranged parallel to each other, then resistance and inductance are reduced and kept substantially equal, but signal transmission quality degrades due to parasitic capacitance
Solution Approach 1:
The bond wires are arranged asymmetrically rather than in a symmetric parallel configuration. The first bond wire extends from a first location to a second location, while the second bond wire extends from a third location to a fourth location, where the vertical spacing between wires varies along their lengths. This asymmetric arrangement reduces parasitic capacitance while maintaining electrical connectivity and signal transmission functionality.
Solution Approach 2:
Different sections of the bond wire arrangement have different vertical spacing to optimize local electrical characteristics. The vertical distance between the first and second bond wires varies along their lengths, creating locally optimized regions that reduce parasitic capacitance where it most impacts signal transmission while maintaining overall connectivity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This arrangement significantly reduces parasitic capacitance between bond wires, enhancing the transmission of high-frequency signals by minimizing signal leakage and maintaining channel balance, thereby improving the common mode immunity of differential channels.
Implementation Method 1
circuits of different ICs communicate over capacitive-coupled bond wires
Implementation Method 2
parasitic capacitance between bond wires, which can be significant when the parasitic capacitance is comparable to the capacitance of isolation capacitors, creating a signal leakage path
Data Source
Figure 1
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Figure 4~5
AI summary
In one embodiment, a device includes a first IC having a differential signal driver and a first isolation circuit configured to provide differential signals transmitted by the differential signal driver to a first pair of bond pads of the first IC. First and second bond wires are configured to provide differential signals from the first pair of bond pads to a second pair of bond pad included in a second IC. The second IC includes a second isolation circuit configured to provide differential signals from the second pair of bond pads to a differential receiver circuit of the second IC. The bond wires are specifically arranged such that a distance between the first and second bond wires varies by at least 10% as measured at two points along a length of the first bond wire.