Bonded Debug Chip for IC Footprint and Security Constraints

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Solution Overview

Problem

Current debugging systems for complex integrated circuit (IC) devices, such as SoC devices, face challenges in efficiently debugging functionalities without occupying large areas and are often costly, with embedded debugging circuitries being permanent and not easily removable after initial debugging, leading to increased device footprints and potential security risks.

Innovation Solution

The implementation of a debugging chip with debugging circuitry that is directly bonded to the IC device surface using non-conductive layers and conductive contact features, allowing for high-density connections and efficient debugging without being permanently embedded, enabling the chip to be removed after initial debugging.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If embedded debugging circuitry is integrated into the IC device, then debugging functionality is achieved, but device footprint increases and security risks arise

Engineering Contradiction:
Improvedebugging functionalityVSAvoiddevice footprint
Core Design Contradiction:
Ease of operationVSArea of stationary object

Solution Approach 1:

The debugging circuitry is extracted from the IC device and placed on a separate debugging chip. The IC device includes a bonding interface with contact features that connect to the debugging chip, allowing debugging functionality while keeping the IC device footprint minimal. The debugging chip can be removed after initial debugging, eliminating permanent embedded circuitry.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The debugging system is segmented into two independent parts: the IC device with bonding interface and the separate debugging chip. This segmentation allows the debugging functionality to be provided externally rather than being integrated into the IC device, thus reducing the device footprint while maintaining debugging capability.

Inventive Principle:
Principle #1Segmentation

2Ease of operation

If embedded debugging circuitry is integrated into the IC device, then debugging functionality is achieved, but security risks increase due to permanent circuitry

Engineering Contradiction:
Improvedebugging functionalityVSAvoidsecurity risks
Core Design Contradiction:
Ease of operationVSObject-affected harmful factors

Solution Approach 1:

The debugging circuitry is extracted from the IC device and placed on a separate debugging chip. This external placement allows the debugging chip to be removed after initial debugging, eliminating permanent embedded circuitry and the associated security risks of having always-accessible debug interfaces.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The debugging chip is designed to be temporary and removable. After initial debugging is completed, the debugging chip can be discarded by removing it from the bonding interface, thereby eliminating the security vulnerability of permanent debug access while preserving the ability to debug when needed.

Inventive Principle:
Principle #34Discarding and recovering

3Ease of operation

If traditional debugging adapters are used to connect to denser IC chip packages, then debugging capability is provided, but cost increases due to expensive high-speed logic and adapters

Engineering Contradiction:
Improvedebugging capabilityVSAvoidcost
Core Design Contradiction:
Ease of operationVSQuantity of substance

Solution Approach 1:

The debugging capability is extracted from expensive external adapters and high-speed logic components and integrated directly into a separate debugging chip that bonds to the IC device. This eliminates the need for costly intermediate adapters and high-speed logic, providing debugging capability through a more cost-effective integrated solution.

Inventive Principle:
Principle #2Taking out (Extraction)

4Ease of operation

If debugging circuitry occupies large areas in the IC device, then debugging functionality is achieved, but manufacturing complexity increases

Engineering Contradiction:
Improvedebugging functionalityVSAvoidmanufacturing complexity
Core Design Contradiction:
Ease of operationVSDevice complexity

Solution Approach 1:

The debugging circuitry is extracted from the IC device manufacturing process and placed on a separate debugging chip. This extraction simplifies IC device manufacturing by removing the need to fabricate and integrate complex debugging circuitry during the IC manufacturing process, while still providing full debugging functionality through the separately manufactured debugging chip.

Inventive Principle:
Principle #2Taking out (Extraction)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach reduces the area used for debugging, enhances debugging efficiency, and eliminates unnecessary circuitry, thereby minimizing device footprint and security risks, while allowing for high-density interconnections and efficient signal processing.

Implementation Method 1

a first non-conductive layer of the integrated circuit device is directly bonded to a second non-conductive layer of the debugging element without an intervening adhesive

Methodology Applied
Scientific EffectDirect hybrid bonding:

Implementation Method 2

a first contact feature of the integrated circuit device is directly bonded to a second contact feature of the debugging element without an intervening adhesive

Methodology Applied
Scientific EffectDirect bonding:

Data Source

PatentUS20240055407A1Bonded debugging elements for integrated circuits and methods for debugging integrated circuits using same
Publication Date: 2024.02.15 ADEIA SEMICONDUCTOR BONDING TECHNOLOGIES INC
  • US20240055407A1 patent drawing
  • US20240055407A1 patent drawing
  • US20240055407A1 patent drawing

AI summary

A bonded structure for debugging integrated circuit devices and a method for debugging integrated circuit devices is disclosed. The bonded structure may comprise a debugging element and an integrated circuit device. The debugging element may comprise a debugging circuitry. The debugging element may be bonded to an integrated circuit device. The debugging element may be configured to debug the integrated circuit device.