Bonding Pad Via Structure Without RDL Signal Delay

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

The existing use of redistribution layers (RDLs) between the top of the BEOL and the bonding pads in integrated circuits (ICs) leads to disadvantages such as increased energy consumption and signal propagation delay.

Innovation Solution

The implementation of IC structures that include one or more vias directly connected to bonding pads, bypassing the need for RDLs, by extending the via continuously from the bonding pads to the conductive interconnect structures in the bottom layer or a conductive structure in the first layer.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If redistribution layers (RDLs) are used between the top of the BEOL and the bonding pads, then the IC structure provides signal routing capability, but energy consumption increases and signal propagation delay occurs

Engineering Contradiction:
Improveenergy consumptionVSAvoidstructure complexity
Core Design Contradiction:
Use of energy by moving objectVSDevice complexity

Solution Approach 1:

The patent extracts and removes the redistribution layer (RDL) from the IC structure, creating a direct via connection from the bonding pad to the conductive interconnect structure in the bottom layer. This elimination of the intermediate RDL layer directly reduces energy consumption and signal propagation delay while maintaining the necessary signal routing capability through the via and interconnect structure.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent introduces a via structure as an intermediary element that directly connects the bonding pad to the conductive interconnect structure in the bottom layer. This via serves as the mediator that replaces the traditional RDL path, providing a more efficient electrical connection that reduces both energy consumption and signal delay while maintaining routing functionality.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Speed

If redistribution layers (RDLs) are used between the top of the BEOL and the bonding pads, then the IC structure provides signal routing capability, but signal propagation delay increases

Engineering Contradiction:
Improvesignal propagation speedVSAvoidstructure complexity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The patent extracts and removes the redistribution layer (RDL) from the IC structure, creating a direct via connection from the bonding pad to the conductive interconnect structure in the bottom layer. This elimination of the intermediate RDL layer directly reduces energy consumption and signal propagation delay while maintaining the necessary signal routing capability through the via and interconnect structure.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent introduces a via structure as an intermediary element that directly connects the bonding pad to the conductive interconnect structure in the bottom layer. This via serves as the mediator that replaces the traditional RDL path, providing a more efficient electrical connection that reduces both energy consumption and signal delay while maintaining routing functionality.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS20250105139A1Integrated circuit structures with vias connected to bonding pads
Publication Date: 2025.03.27 INTEL CORP
  • US20250105139A1 patent drawing
  • US20250105139A1 patent drawing
  • US20250105139A1 patent drawing

AI summary

An example IC structure includes a first layer comprising a plurality of transistors; a second layer comprising a stack of layers of one or more insulator materials and conductive interconnect structures extending through the one or more insulator materials; a third layer comprising bonding pads, wherein the second layer is between the first layer and the third layer; and a via continuously extending between one of the bonding pads and one of the conductive interconnect structures in a bottom layer of the stack of layers or a conductive structure in the first layer, wherein the bottom layer is a layer of the stack of layers that is closer to the first layer than all other layers of the stack of layers.