Bonding Structure Trench Etching for SoIC Pad Reliability
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing methods for forming bonding structures in system-on-integrate-chip (SoIC) packages are inadequate in ensuring satisfactory electrical functionality and stability, particularly due to issues like over-etching and unsatisfactory adhesion between dielectric layers, leading to cracks, peeling, and warpage.
Innovation Solution
A method involving the formation of a funnel-shape trench through a multi-layer dielectric structure using multiple etching processes with specific etchant compositions and conditions, accompanied by the use of an oxide-rich liner to improve adhesion and reduce defects, forming a bonding structure that includes a multi-layer dielectric structure with specific layers to enhance adhesion and reduce defects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional etching methods are used to form bonding structures, then the bonding structures can be formed, but over-etching of conductive pads occurs leading to reduced reliability
Solution Approach 1:
The patent divides the etching process into multiple sequential etching steps, each with controlled parameters and duration. The first etching step forms an initial trench, followed by a second etching step that completes the trench formation. This segmentation allows precise control over etching depth and prevents over-etching of the conductive pad, thereby maintaining both manufacturing precision and bonding structure reliability.
Solution Approach 2:
The patent forms a mask pattern and performs preliminary etching steps before final trench completion. The mask layer is deposited and patterned in advance to define the trench boundaries, and preliminary etching creates an initial structure that guides subsequent etching. This preliminary action ensures that the final etching does not exceed the required depth, preventing conductive pad damage while achieving precise trench formation.
2Ease of manufacture
If dielectric layers are deposited without intermediate adhesion layers, then the manufacturing process is simpler, but adhesion between dielectric layers is poor causing cracks and peeling
Solution Approach 1:
The patent introduces an oxide-rich liner layer as an intermediate adhesion layer between the conductive pad and the first dielectric layer, and between the first and second dielectric layers. This oxide-rich liner acts as a mediator that enhances interfacial adhesion, preventing cracks and peeling. The liner is formed through controlled oxidation of the conductive pad surface and is integrated into the etching and deposition process sequence, maintaining manufacturing feasibility while significantly improving bonding strength.
3Manufacturing precision
If multiple etching processes are performed to prevent over-etching, then etching precision is improved, but the manufacturing process becomes more complex
Solution Approach 1:
The patent combines multiple etching steps into a unified trench formation process where the first and second etching steps are sequentially performed without complete intermediate processing. The mask pattern serves as a continuous guide throughout the etching sequence, and the oxide-rich liner formation is integrated with the etching process. This merging approach maintains precise trench formation while reducing overall process complexity compared to completely separate etching operations.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method effectively prevents over-etching of conductive pads and improves adhesion between dielectric layers, reducing cracks, peeling, and warpage, thereby enhancing the electrical connectivity and stability of SoIC packages.
Implementation Method 1
an oxide-rich liner sandwiched by two dielectric structures to improve adhesion
Implementation Method 2
performing a number of etching processes to form a funnel-shape trench extending through a multi-layer dielectric structure
Data Source
AI summary
A method includes forming a conductive pad over a substrate, forming a multi-layer passivation structure on the conducive pad, patterning a top portion of the multi-layer passivation structure to form a first opening, forming a mask film on sidewall surfaces of the patterned top portion of the multi-layer passivation structure, after the forming of the mask film, performing a first etching process to remove a portion of the multi-layer passivation structure directly under the first opening to form a second opening, after the performing of the first etching process, selectively removing the mask film, performing a second etching process to remove a portion of the multi-layer passivation structure directly under the second opening, thereby forming a third opening exposing the conductive pad, and forming a bonding structure in the third opening, where an etchant of the second etching process is different than an etchant of the first etching process.