Bonding Wire Resistance Control for Current Mirror Parasitic Shift
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Solution Overview
Problem
Current mirror circuits in semiconductor devices face issues with uneven electric current flow due to parasitic resistance from metal wiring, leading to shifts in the designated current rate, which conventional methods fail to fully address by only matching transistor characteristics.
Innovation Solution
The semiconductor device incorporates a current mirror circuit with controlled resistance values of bonding wires to correct the shift in output electric current caused by parasitic resistances, by adjusting the number, diameter, length, or material of the bonding wires to ensure the desired current flow, even when parasitic resistances are non-zero.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If transistors are made with equal channel lengths and widths to match characteristics, then transistor matching is improved, but current rate accuracy deteriorates due to parasitic resistance in metal wiring
Solution Approach 1:
The patent applies local quality by making the bonding wires have different resistance values tailored to specific circuit nodes. The first bonding wire connected to the first transistor has a different resistance than the second bonding wire connected to the second transistor, allowing each connection to be optimized for its specific parasitic resistance conditions while maintaining overall current mirror accuracy
Solution Approach 2:
The patent changes the resistance parameter of the bonding wires to compensate for parasitic resistance effects. By carefully selecting and controlling the resistance values of the bonding wires (making them unequal), the patent offsets the unwanted parasitic resistance in the metal wiring, thereby maintaining accurate current mirroring despite the presence of parasitic elements
2Manufacturing precision
If bonding wire resistance is controlled to correct current shift, then current accuracy is improved, but device complexity increases
Solution Approach 1:
The patent utilizes parameter changes by controlling the resistance values of existing bonding wires to achieve current correction. Instead of adding new components, it adjusts the resistance parameter of the bonding wires (through selection, length, material, or cross-sectional area) to compensate for parasitic resistance, thereby maintaining current accuracy without significantly increasing device complexity
Solution Approach 2:
The bonding wires serve as intermediary elements that mediate between the external connection terminals and the current mirror circuit. By introducing controlled resistance in these intermediary bonding wires, the patent compensates for the parasitic resistance in the metal wiring, acting as a corrective mediator that maintains current accuracy
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively maintains the desired electric current rate by balancing the resistance values, preventing shifts and ensuring a stable output current, thereby overcoming the limitations of conventional methods.
Implementation Method 1
a resistance value of the bonding wire is controlled so that a shift of an output electric current of the current mirror circuit based on the parasitic resistance is corrected
Data Source
AI summary
A semiconductor device includes a semiconductor element including a current mirror circuit, a parasitic resistance formed at the current mirror circuit, and a connection terminal electrically connected to a part of the current mirror circuit via an electric conductor including a bonding wire, the connection terminal being configured to perform input and output relative to an outside of the semiconductor device; wherein a resistance value of the bonding wire is controlled so that a shift of an output electric current of the current mirror circuit based on the parasitic resistance is corrected.


