Boost Capacitor Voltage Magnitude for Sense Amplifier Read Speed
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
As device size decreases, sense amplifier circuitry in memory circuits faces challenges in matching devices, leading to offsets and mismatches that degrade performance, requiring longer read times to detect bit line voltage changes accurately.
Innovation Solution
The use of boost capacitors coupled to bit lines through boost control circuitry, which samples initial voltage changes and adds them to the sense amplifier circuitry, increasing the voltage magnitude to improve detection and latch performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If device size is reduced, then memory density is improved, but sense amplifier device matching deteriorates causing offsets and mismatches
Solution Approach 1:
The boost capacitor is charged in advance during the precharge phase before the read operation. This preliminary charging stores the initial voltage state in the capacitor, which is then used to boost the voltage change during reading. By preparing the capacitor beforehand, the system compensates for device mismatches without requiring larger devices, thus maintaining high density while improving sensing accuracy.
2Measurement precision
If read time is extended, then voltage change detection accuracy is improved, but memory performance deteriorates
Solution Approach 1:
The system changes the voltage parameter by using the boost capacitor to amplify the voltage change on the bit line. Instead of waiting longer for the voltage change to be detectable, the capacitor actively increases the voltage swing magnitude. This parameter transformation allows fast reading while maintaining detection accuracy, resolving the contradiction between speed and precision.
3Reliability
If sense amplifier margin is increased, then detection robustness is improved, but read time increases
Solution Approach 1:
The boost capacitor is charged during the precharge phase before reading occurs. This preliminary action stores the initial voltage state, which is then used to create a larger voltage change during the read operation. By preparing the capacitor in advance, the system achieves robust detection without extending read time, as the boosted voltage is already ready to be detected immediately.
Solution Approach 2:
The system transforms the voltage parameter by using the capacitor to amplify the voltage change magnitude. This parameter change creates a larger signal that can be detected more robustly by the sense amplifier, improving reliability without requiring extended margin time. The voltage boost occurs during the read operation itself, not as a preliminary step.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This technique enhances read speed and robustness by increasing the voltage magnitude supplied to the sense amplifier, reducing misreads and allowing for near-minimum-sized device manufacturing, thereby improving memory performance and density.
Implementation Method 1
an initial voltage change upon said at least one of said plurality of bit lines during said read operation produces a sampled charge with a sampled voltage difference to be stored by said at least one boost capacitor
Implementation Method 2
said sampled voltage difference is added to said said voltage change on said at least one of said plurality of bit lines and supplied to said sense amplifier circuitry
Data Source
AI summary
Memory circuitry 2 includes an array 4 of bit cells 6. One or more boost capacitors C1, C2 are connected to bit lines 8 running through the array 4 and serve to store a sample charge with a sample voltage difference during a sampling configuration of the boost capacitors C1, C2. A boost configuration is subsequently adopted in which the boost capacitors C1, C2 are connected with a different plurality to respective bit lines 8 such that the sample voltage difference is added to the voltage change within the bit line produced by the bit line cell 6 so as to generate an increased magnitude change in voltage which is supplied to sense amplifier circuitry 12.


