Boost Structures for NAND Flash Memory Programming
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Solution Overview
Problem
Existing non-volatile memory technologies face challenges in optimizing programming operations due to the need for high voltages, which can lead to program disturb and inefficiencies in verify and read operations, particularly in NAND flash memory devices.
Innovation Solution
The introduction of boost structures in non-volatile memory fabrication, which allows for the application of a boost voltage to assist in programming and verification processes, enabling lower programming voltages and concurrent characterization of multiple storage elements with a common word line voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If high programming voltages are applied to program memory elements, then programming speed is improved, but program disturb occurs and reliability deteriorates
Solution Approach 1:
The patent divides the programming function into two parts: a boost structure that provides a fixed high voltage boost to the control gate, and a word line that provides a variable programming voltage. This segmentation allows the boost structure to handle the high voltage requirement while the word line manages the precise voltage control, preventing program disturb to non-selected cells.
Solution Approach 2:
The boost structure acts as an intermediary that couples to the control gate through a coupling capacitor. This intermediary provides the necessary voltage boost without directly applying high voltage through the word line, thereby enabling fast programming while minimizing the risk of program disturb to adjacent memory elements.
2Productivity
If high programming voltages are applied to achieve fast programming, then programming efficiency is improved, but verify and read operations become less efficient
Solution Approach 1:
The patent employs dynamic voltage adjustment where the word line voltage can be varied independently from the boost structure voltage. During programming, the word line provides high voltage for fast programming; during verify and read operations, the word line voltage is reduced to appropriate levels, making these operations easier and more reliable without sacrificing programming speed.
3Productivity
If multiple storage elements are programmed concurrently with a common word line, then productivity is improved, but voltage control precision deteriorates
Solution Approach 1:
By segmenting the voltage control into a fixed boost component from the boost structure and a variable component from the word line, the patent enables multiple storage elements sharing a common word line to be programmed concurrently with precise voltage control. Each element receives the same boost voltage plus the word line voltage, allowing independent and precise control of the total programming voltage for each element.
Data Source
AI summary
A method for fabricating a non-volatile memory having boost structures. Boost structures are provided for individual NAND strings and can be individually controlled to assist in programming, verifying and reading processes. The boost structures can be commonly boosted and individually discharged, in part, based on a target programming state or verify level. The boost structures assists in programming so that the programming and pass voltage on a word line can be reduced, thereby reducing side effects such as program disturb. During verifying, all storage elements on a word line can be verified concurrently. The boost structure can also assist during reading. In one approach, the NAND string has dual source-side select gates between which the boost structure contacts the substrate at a source/drain region, and a boost voltage is provided to the boost structure via a source-side of the NAND string.