Boosted High-Speed Level Shifter for Shorter Leakage Periods
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Solution Overview
Problem
Existing level shifters face inefficiencies in switching voltage levels due to leakage periods during signal transitions, particularly due to the limited current-sourcing capability of pull-up transistors, which affects operational speed and power efficiency.
Innovation Solution
A boosted high-speed level shifter design that includes a driver circuit to generate a drive signal with a voltage swing greater than the input signal, enhancing the current-sourcing capability of pull-up transistors and reducing leakage periods by increasing the drive voltage, allowing for smaller transistor dimensions and improved efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the pull-up transistor is designed with standard dimensions, then the device area is minimized, but the current-sourcing capability is limited causing extended leakage periods and reduced operational speed
Solution Approach 1:
The patent implements dynamic sizing of pull-up transistors where the transistor dimensions are adjusted based on operational requirements. Specifically, the pull-up transistor connected to the higher voltage rail is designed with larger dimensions to provide enhanced current-sourcing capability during critical switching transitions, while other transistors maintain standard dimensions. This dynamic differentiation resolves the contradiction by providing high speed only where necessary.
Solution Approach 2:
The patent applies local quality by enhancing the current-sourcing capability specifically at the pull-up transistor connected to the higher voltage rail, rather than uniformly increasing all transistor dimensions. This localized enhancement provides the necessary speed improvement for critical transitions while maintaining area efficiency in other parts of the circuit.
2Loss of time
If the pull-up transistor current-sourcing capability is increased to reduce leakage periods, then the leakage period duration decreases, but the transistor dimensions must be increased leading to larger device area
Solution Approach 1:
The patent uses dynamic transistor sizing to increase current-sourcing capability only in the critical path. The pull-up transistor connected to the higher voltage rail is designed with larger dimensions to rapidly charge the output node and minimize leakage periods during transitions, while other transistors maintain standard dimensions, thus reducing the overall area impact.
Solution Approach 2:
The patent applies local quality by selectively enhancing the dimensions of specific pull-up transistors that are critical for reducing leakage periods, rather than increasing all transistor dimensions uniformly. This localized approach minimizes the area overhead while achieving the desired reduction in leakage period duration.
3Productivity
If larger transistor dimensions are used to increase current-sourcing capability, then the leakage period is reduced, but the physical dimensions and layout area increase
Solution Approach 1:
The patent implements dynamic sizing where only the critical pull-up transistor connected to the higher voltage rail is enlarged to improve switching efficiency during transitions. Other transistors maintain standard dimensions, thus achieving improved productivity without a proportional increase in overall transistor dimensions and layout area.
Solution Approach 2:
The patent applies local quality by enhancing the dimensions of specific transistors that are critical for switching efficiency, rather than uniformly increasing all transistor dimensions. This localized enhancement improves productivity while minimizing the impact on physical dimensions and layout area.
Data Source
AI summary
Methods, systems, and devices for shifting voltage levels of electrical signals and more specifically for boosted high-speed level shifting are described. A boosted level shifter may include a driver circuit that generates a drive signal having a greater voltage swing than an input signal, and the drive signal may drive the gate of a pull-up transistor within the boosted level shifter. The lower bound of the drive signal may in some cases be a negative voltage. Driving the pull-up transistor with a drive signal having a greater voltage swing than the input signal may improve the operational speed and current-sourcing capability of the pull-up transistor, which may provide speed and efficiency benefits.