Boosted Switch Driver Circuit for Beyond-Rail Clock Swing
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Solution Overview
Problem
Designing boosted switch drivers for high-speed signal switching, particularly in RF ADCs, is challenging due to physical constraints and the need for optimal performance within limited space and power supply constraints.
Innovation Solution
The implementation of a switch driver circuit with two branches, one including a P-type transistor and the other an N-type transistor, with a level shifter circuit to split and level-shift the input clock signal, allowing the output voltage swing to exceed core supply rails, thereby enhancing clocking speed and dynamic range.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the output voltage swing is increased beyond core supply rails to improve dynamic range, then the dynamic range is improved, but the device complexity increases
Solution Approach 1:
The switch driver is divided into two separate branches: a first branch with a P-type transistor and a second branch with an N-type transistor. Each branch independently controls one half of the clock signal, allowing the output to swing beyond the core supply rails while maintaining manageable complexity in each individual branch.
Solution Approach 2:
The outputs of the first branch (P-type transistor) and second branch (N-type transistor) are combined to generate the final boosted clock signal. This merging of complementary branches achieves the voltage swing beyond core supply rails while distributing the complexity across separate functional units.
2Productivity
If the clocking speed is increased for high-speed signal processing, then the productivity is improved, but the device complexity increases
Solution Approach 1:
The clock signal generation is segmented into two parallel branches that operate simultaneously. The first branch generates the high portion of the clock signal while the second branch generates the low portion, enabling high-speed operation without overloading a single transistor branch.
Solution Approach 2:
The switch driver dynamically switches between the two branches based on the input clock signal phase. During different phases, different branches are activated, allowing the circuit to maintain high-speed operation by continuously utilizing the most appropriate branch for the current signal state.
3Measurement precision
If the output voltage swing exceeds core supply rails to improve signal processing performance, then the dynamic range is improved, but the ease of manufacture worsens
Solution Approach 1:
Each branch is designed with specific local characteristics: the first branch uses a P-type transistor optimized for generating high voltage levels, while the second branch uses an N-type transistor optimized for generating low voltage levels. This local optimization allows each branch to be manufactured with standard processes while achieving the overall boosted output swing.
Data Source
AI summary
An example boosted switch driver circuit includes two branches. The first branch includes a first transistor. The second branch includes a second transistor and a level shifter circuit. One of the transistors is an N-type transistor and the other one is a P-type transistor. The circuit is configured to split an input clock signal between the first branch and the second branch, so that a portion of the input clock signal split to the first branch is provided to the first transistor, and a portion of the input clock signal split to the second branch is level-shifted by the level shifter circuit to generate a level-shifted input clock signal and the level-shifted input clock signal is provided to the second transistor. The circuit is further configured to combine an output of the first transistor and an output of the second transistor to generate an output clock signal.