Booster Circuit Dynamic Clock Pulse Control
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Solution Overview
Problem
Booster circuits for semiconductor devices face challenges in generating a stable boosted voltage without increasing power consumption, as manufacturing variations can affect the threshold voltage of transfer gates, leading to either prolonged boosting periods or excessive ringing of the boosted voltage.
Innovation Solution
A booster circuit with a charge pump unit and a control unit that adjusts the pulse voltage of clock signals based on the ratio of time the boosted voltage exceeds a target voltage, using multiple charge pump circuits connected in series to manage power consumption and suppress ringing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If the threshold voltage of the transfer gate shifts to higher voltages due to manufacturing variations, then the transfer period of the charge decreases, but the operation period of the charge pump circuit needs to be increased, causing increased power consumption
Solution Approach 1:
The patent dynamically changes the pulse width of the clock signal applied to the transfer gate based on the actual charging state of the capacitor. When the capacitor charge level is low, a longer pulse width compensates for higher threshold voltage, ensuring sufficient charge transfer. When the capacitor charge level is high, a shorter pulse width prevents overcharging and reduces power consumption, thus adapting to manufacturing variations in transfer gate threshold voltage.
Solution Approach 2:
The patent introduces dynamic control of the clock signal pulse width rather than using a fixed pulse width. The control unit adjusts the pulse width in real-time based on feedback about the capacitor's charge state, making the charge pump circuit adaptable to variations in transfer gate characteristics and optimizing power consumption under different operating conditions.
2Speed
If the threshold voltage of the transfer gate shifts to lower voltages, then the boosting speed becomes too fast, causing ringing of the boosted voltage about the desired voltage value
Solution Approach 1:
The patent dynamically adjusts the clock signal pulse width based on the capacitor's charge state. When the capacitor is nearly fully charged, the pulse width is reduced, slowing down the charging process and preventing overshoot and ringing of the boosted voltage. This dynamic parameter adjustment ensures stable voltage output even when the transfer gate has lower threshold voltage that would otherwise cause excessively fast boosting.
3Reliability
If the operation period of the charge pump circuit is increased to compensate for higher threshold voltage, then the boosted voltage reaches the desired value, but power consumption increases
Solution Approach 1:
The patent applies partial action by adjusting the clock signal pulse width to match the actual charging needs of the capacitor. Instead of using a consistently long pulse width that guarantees voltage achievement but wastes energy, the system uses just enough pulse width to achieve the desired voltage, reducing unnecessary power consumption while maintaining reliability.
Solution Approach 2:
The patent implements feedback control where the actual charge state of the capacitor is monitored and used to adjust the clock signal pulse width. This feedback mechanism ensures that the charge pump operates efficiently, achieving the desired voltage without excessive operation time and minimizing power consumption by adapting to real-time conditions.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively reduces power consumption and suppresses voltage ringing by dynamically adjusting clock pulse voltages, ensuring stable voltage generation despite manufacturing variations in transfer gate threshold voltages.
Implementation Method 1
a capacitor that accumulates a charge on the output node according to a first clock signal
Implementation Method 2
a transfer gate that takes in and applies a voltage of the input node to the output node according to a second clock signal received at a control terminal
Data Source
AI summary
A charge pump unit including a capacitor that accumulates a charge on an output node according to a first clock signal and a transfer gate that takes in and applies a voltage of an input node to the output node according to a second clock signal received at a control terminal is controlled in the following manner. If the ratio of the total time of periods in which the voltage of the output node is higher than a target voltage in a predetermined monitoring period is smaller than or equal to a first threshold, i.e., if the charge pump unit executes a boosting operation for a relatively long period, a pulse voltage value of the second clock signal is increased.