Apparatus Without Intermediate Ac Conversion TRIZ Cases

A power supply apparatus manages mode transitions between a direct switch path and a converting module to stabilize output voltage.

Charge pump architecture generates ultrahigh DC voltages using standard low voltage CMOS technology, reducing die area and fabrication costs.

Gate boosting capacitors mitigate parasitic capacitances in MOS transistors, ensuring complete switching and increasing output voltage.

Shift generator adjusts saw-tooth signal to reduce overshoot and improve line transient response in DC-to-DC converters.

Dynamic clock frequency adjustment reduces power consumption and improves reliability in EEPROM voltage regulation.

A protection capacitor blocks direct current flow in a booster circuit to prevent component burnout.

An active charge pump circuit generates boosted voltage using PMOS transistors and a control signal.

A series charge pump circuit transforms voltage and current levels using internal and external capacitors to supply diverse sub-circuit power requirements.

A voltage balancing circuit adjusts charge and discharge of a flying capacitor to maintain stable voltage levels.

A ping-pong charge pump equalizes flying capacitor voltages using differential control currents.

An indirect sensing circuit calculates flying capacitor voltage using resistor networks and auxiliary switches, eliminating direct sensing complexity.

A booster circuit adjusts clock pulse voltage to stabilize boosted output.

A charge pump sub-stage uses differential input signals and offset voltages to control transistor conduction.

Dynamic amplitude modulation of gate clock signals reduces quiescent power consumption while maintaining output voltage levels across varying load conditions.

Embedding the magnetic core within the substrate eliminates shield layers and reduces fabrication costs while achieving higher inductance values.

A protection voltage generator creates multiple intermediate voltages using a resistor and cascode ladder to safely interface high supply rails with low voltage circuitry.

A bulk voltage controller manages connections between boost nodes and output nodes in a CMOS charge pump circuit.

A single-inductor inverting buck-boost converter uses a grounded switch to couple energy between boost and charge pump stages.

A voltage regulator uses a charge pump to supplement current flow through transistors M1 and M2.

A power supply protection circuit maintains load voltage using a charge reservoir capacitor and comparator.

A dynamically scaled charge pump adjusts output voltage ratios to maintain efficiency across varying input levels.

An adaptive voltage regulator circuit supplies low-current real-time clock modules by switching between LDO and charge pump modes to reduce power consumption.

A switching power converter uses transformer-based digital communication to transmit operating parameters between primary and secondary sides.

Segmented charge pump stages lower gate-source voltage loss, enabling standard bipolar transistors and minimizing high voltage MOS losses.

Segmenting the switched-capacitor stages and applying slew control reduces voltage ripple while maintaining high power conversion efficiency.

A DC-DC converter uses partial sense voltage resets to control buck output.

Masking logic and offset feedback provide hysteresis to a buck-boost switching regulator.

A transformer-less drive circuit replaces magnetic components with capacitors to boost voltage while resisting ESD and EMC events.

An internal voltage generation circuit uses control signals to block current flow through a generation node during operation.

A current mirror driver circuit regulates startup inrush current through very low ohmic FETs without adding series impedance.

A ratio-reconfigurable switched-capacitor converter generates arbitrary rational conversion ratios using negative feedback voltages.

A switching power converter circuit dynamically adjusts ramp signal slope and amplitude to maintain high precision output voltage regulation.

Adjusting apparatus measures capacitor charging time to set current source designated values for stable switching power output.

A switched capacitor voltage converter circuit uses MOSFET switches to reconfigure capacitor networks for dynamic voltage conversion.

A charge pump circuit uses a ripple control mechanism to stabilize output voltage.

A semiconductor memory device uses a control circuit to generate non-overlapping enable signals for charge pumps across multiple dies.

Parallel charge pump circuits use make-before-break switching to deliver continuous current without external filtering capacitors.

A soft start circuit controls bootstrap supply voltages to limit peak currents during charge pump activation.

Multi-switch arrangements coordinate operation timing to minimize hot carrier stress in switched capacitor dc-dc converters.

A negative charge pump generates a voltage rail using standard CMOS inverters and capacitors.

Switch array circuit manages fractional gain transitions to regulate output voltage while minimizing electromagnetic interference and manufacturing costs.

Replacing complex LDOs, the circuit employs voltage clamping and filtering modules to provide multiple outputs while reducing chip area occupation.

A negative voltage pumping unit merges current sources to drive oscillator signals and internal circuits simultaneously.

Dynamic voltage division ratio control reduces output fluctuations in DC/DC converters under changing input voltages.

Dynamic threshold adjustment based on di/dt prevents hazardous overcurrent while enabling full-scale inductor operation.

Interleaved gain-extension networks in a two-switch boosting switched-capacitor converter reduce component count and minimize voltage stress.

Self-service compensator measures frequency response characteristics without external analyzers, maintaining stability in high-power systems.

A charge balance circuit compares output voltage to feedback voltage using constant current sources or sinks.