Current Mirror Driver for VLOFET Inrush Limiting

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Solution Overview

Problem

Step-up DC-to-DC converter circuits using very low ohmic FETs (VLOFETs) face significant startup inrush current issues, which can damage circuit elements and power supplies due to the lack of impedance, leading to efficiency losses when attempting to limit this current with conventional methods.

Innovation Solution

A current mirror driver circuit is coupled to the gate of VLOFETs to form a current mirror, regulating current flow during startup and eliminating the need for additional impedance in the circuit pathway, thus maintaining high efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of energy

If very low ohmic FETs (VLOFETs) are used in step-up DC-to-DC converter circuits, then efficiency is improved, but startup inrush current increases to damaging levels

Engineering Contradiction:
ImproveefficiencyVSAvoidstartup inrush current
Core Design Contradiction:
Loss of energyVSObject-affected harmful factors

Solution Approach 1:

The patent applies preliminary action by implementing a soft-start mechanism that gradually enables the VLOFETs during startup rather than immediately fully conducting. The control circuit progressively increases the gate voltage or gradually turns on the FETs, allowing the output capacitor to charge in a controlled manner before full power operation, thereby preventing inrush current while maintaining low on-resistance for efficiency.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent applies dynamics by making the FET resistance dynamic rather than static. The control circuit adjusts the effective on-resistance of the VLOFETs based on operating conditions - maintaining very low resistance during normal operation for high efficiency, while dynamically increasing resistance during startup through controlled gate voltage application or current limiting circuits, thus resolving the contradiction between low loss and inrush current protection.

Inventive Principle:
Principle #15Dynamics

2Object-affected harmful factors

If conventional current limiting methods are used, then startup inrush current is reduced, but efficiency decreases due to added impedance

Engineering Contradiction:
Improvestartup inrush currentVSAvoidefficiency
Core Design Contradiction:
Object-affected harmful factorsVSLoss of energy

Solution Approach 1:

The patent uses dynamic control of FET resistance to provide current limiting only when needed. During startup, the control circuit creates effective impedance to limit inrush current. During normal operation, the FETs are fully enhanced to achieve their minimum on-resistance, eliminating the continuous power loss that would result from static impedance additions. This temporal separation of limiting and conduction modes resolves the efficiency contradiction.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the electrical parameters of the FETs dynamically - specifically the gate-source voltage and channel resistance - based on the operational phase. During startup, parameters are adjusted to limit current; during steady-state operation, parameters are optimized for minimum resistance and maximum efficiency. This parameter modulation allows the system to have both inrush protection and high efficiency without permanent impedance additions.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The current mirror driver circuit effectively limits startup inrush current to acceptable levels without reducing efficiency, allowing for high-efficiency step-up DC-to-DC converter operations using VLOFETs.

Implementation Method 1

A current mirror driver circuit is coupled to the gate of VLOFETs to form a current mirror, regulating current flow during startup

Methodology Applied
Scientific EffectCurrent mirror:

Data Source

PatentUS11283344B2Current in-rush limiter
Publication Date: 2022.03.22 MURATA MFG CO LTD
  • US11283344B2 patent drawing
  • US11283344B2 patent drawing
  • US11283344B2 patent drawing

AI summary

Circuits and methods for limiting excessive current in circuits (such as step-up DC-to-DC converter circuits) in which very low ohmic FETs (VLOFETs) are used in circuit pathways that are subjected to startup in-rush current. Embodiments include a current mirror driver circuit that can be coupled to the gates of a VLOFET to form a current mirror that limits current flow through the VLOFET. The current mirror driver circuit provides for pulsed operation so that a coupled VLOFET still toggles between an OFF state and a current limited mode, particularly during a startup period. By using the current mirror driver circuit in conjunction with VLOFETs in circuit pathways that are subjected to startup in-rush current, in-rush current can be regulated to an acceptable level. Notably, no additional impedances are required in circuit pathways that are subjected to startup in-rush current to limit in-rush current, thus avoiding loss of efficiency.