Multi-Die Memory Charge Pump Control for Peak Current Reduction
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Solution Overview
Problem
In semiconductor memory devices with multiple stacked memory dies, existing technologies face challenges in managing the simultaneous operation of charge pumps, leading to peak current consumption issues during standby and active modes, as all charge pumps are typically activated, which is inefficient and may cause power-related data loss.
Innovation Solution
A semiconductor memory device is designed with a control circuit and signal generator that allows charge pumps in different memory dies to operate in a time-distributed manner, using non-overlapping enable signals and clock signals to prevent simultaneous operation, thereby reducing peak current consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If all charge pumps are activated in multi-die memory structure, then memory operation reliability is improved, but peak current consumption increases
Solution Approach 1:
The patent implements periodic action by activating charge pumps in different memory dies at different time periods. The control circuit generates non-overlapping enable signals that periodically activate charge pumps in a time-multiplexed manner, ensuring that at least one charge pump is active to maintain reliability while preventing simultaneous activation that would cause peak current consumption.
2Adaptability or versatility
If charge pumps operate simultaneously in all memory dies, then voltage generation availability is improved, but power consumption increases
Solution Approach 1:
The patent applies dynamics by making the charge pump activation state dynamic rather than static. The control circuit dynamically adjusts which charge pumps are active based on operational requirements, transitioning between different activation states to balance voltage generation availability with power consumption reduction.
Solution Approach 2:
The control circuit generates periodic non-overlapping enable signals that activate charge pumps in different memory dies at different time periods. This periodic activation ensures that voltage generation capability is maintained across the multi-die structure while preventing simultaneous operation that would cause excessive power consumption.
3Speed
If charge pumps are activated during standby mode, then voltage readiness is improved, but current consumption increases
Solution Approach 1:
During standby mode, the control circuit activates charge pumps periodically rather than continuously. Non-overlapping enable signals are generated to activate charge pumps in different memory dies at different times, ensuring voltage readiness is maintained while minimizing current consumption during idle periods.
Solution Approach 2:
The patent applies partial action by activating only the necessary number of charge pumps during standby mode rather than all charge pumps. The control circuit determines the minimum required voltage generation capacity and activates only that many charge pumps, reducing current consumption while maintaining sufficient voltage readiness.
Data Source
AI summary
A semiconductor memory device includes a first memory die, a control circuit, and a signal generator. The first memory die includes at least one charge pump on a memory die. The control circuit is configured to control driving of the at least one charge pump during a time period. The signal generator is configured to generate a control signal that prevents the at least one charge pump of the first memory die not to be driven at a same time with a charge pump in a second memory die different from the first memory die and to apply the generated pump enable control signal to the pump enable unit.