Charge Pump Sub-Stage Using Differential Signals to Reduce Voltage Drop
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional charge pumps, such as the Dickson charge pump, are inefficient due to high voltage drop across diodes, leading to significant energy wastage and requiring multiple stages to achieve desired output voltages, especially when dealing with low-input RF signals.
Innovation Solution
The use of differential input signals and offset voltage signals to reduce the effective threshold voltage of transistors, allowing the current channel to be in forward bias for a larger proportion of the time, thereby reducing energy wastage and increasing efficiency by using a sub-stage configuration with n-type and p-type field effect transistors and capacitors to manage charge transfer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If conventional charge pumps use diodes for charge transfer, then the circuit structure is simple, but the voltage drop across diodes causes high energy loss and low efficiency
Solution Approach 1:
The patent replaces diodes with transistors operating in different regions (cut-off, linear, saturation) to change the electrical parameters of the charge transfer mechanism. This substitution reduces voltage drop from typical diode levels (0.7V) to much lower levels, dramatically reducing energy loss P=V*I while accepting increased circuit complexity through transistor-based switching networks
Solution Approach 2:
The patent substitutes the passive diode-based charge transfer mechanism with an active transistor-based system controlled by clock signals. This replacement enables dynamic control of charge transfer timing and path, optimizing efficiency while managing complexity through systematic clocking schemes
2Power
If multiple stages are used to achieve desired output voltages, then the output voltage requirement is met, but the number of components increases and energy wastage accumulates
Solution Approach 1:
The patent divides the charge pump into multiple stages, each containing transistors Q1-Q4 with associated capacitors and clock signal inputs. This segmentation allows systematic voltage multiplication while maintaining modularity, where each stage contributes to the overall output voltage through controlled charge transfer to output capacitors
Solution Approach 2:
The patent employs periodic clock signals (CLK1, CLK2, CLK3, CLK4) to control the switching of transistors in each stage. This periodic action synchronizes charge transfer across multiple stages, enabling cumulative voltage buildup at the output while managing complexity through rhythmic, predictable switching patterns
3Use of energy by moving object
If low-input RF signals are processed, then the charge pump must operate at low voltages, but this increases the proportion of voltage lost to threshold drops
Solution Approach 1:
The patent changes the operating parameters of transistors by using low-threshold-voltage devices and optimizing bias conditions. This allows the charge pump to operate efficiently at low input voltages typical of RF harvesting applications, where the voltage headroom for threshold drops is minimal, thereby improving energy conversion efficiency from RF to DC
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the energy conversion efficiency of charge pumps, particularly in RFID devices, by reducing voltage drop across transistors and minimizing leakage current, achieving efficiencies exceeding 50% compared to conventional systems.
Implementation Method 1
a first transistor (224) and a second transistor (226) arranged in series between the DC input pin and the DC output pin; each having a control terminal (204, 206) and a current channel therebetween
Implementation Method 2
first and second capacitors (228, 230) connected in parallel between the first rf input pin and the DC output pin
Data Source
Figure 1~2a
Figure 2b~3
Figure 4
AI summary
A sub-stage (212) for a charge pump (200) having a first and second phase of operation. The sub-stage (212) comprising a dc input pin (222); a dc output pin (220); a first rf input pin (202) configured to receive a first differential signal; and a second rf input pin (204) configured to receive a second differential signal. The sub-stage (212) further comprising a first transistor (224) having a first, second and third terminal, wherein a current channel is provided between the first and second terminal of the transistor (224); and a second transistor (226) having a first, second and third terminal, wherein a current channel is provided between the first and second terminal of the transistor (226). The first terminal of the first transistor (224) is connected to the dc input pin (222), the second terminal of the first transistor (224) is connected to the first terminal of the second transistor (226), and the second terminal of the second transistor (226) is connected to the dc output pin (220). The first rf input pin (202) is coupled to the second terminal of the first transistor (224) and the first terminal of the second transistor (226), such that the current channel of the first transistor (224) conducts signalling received at the first rf input pin (202) during the first phase of operation, and the current channel of the second transistor (226) conducts signalling received at the first rf input pin (202) during the second phase of operation. The sub-stage further comprising a first bias voltage source (232) and a second bias voltage source (234); wherein the third terminal of the first transistor (224) is configured to receive a second differential signal from the second rf input pin (204) and a first offset voltage signal from the first bias voltage source (232); and the third terminal of the second transistor (226) is configured to receive a second differential signal from the second rf input pin (204) and a second offset voltage signal from the second bias voltage source (234).