Negative Charge Pump for Audio ASIC Integration
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Solution Overview
Problem
Existing negative charge pumps require an electrical potential below the ground potential for their own power supply, making them difficult to integrate monolithically in ASIC chips and prone to distortion in audio signal amplification due to limited supply voltage.
Innovation Solution
A negative charge pump design that utilizes standard CMOS technology, eliminating the need for special high-voltage transistors or external capacitors, and produces a negative output voltage using a combination of inverters and charge storage, allowing for a controllable output potential without requiring a potential below ground, thus enabling integration within ASIC chips and reducing signal distortion.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If a negative charge pump is designed to operate with a supply voltage of 1.2V or below, then power consumption is reduced, but the amplifier gain is limited and distortion problems occur
Solution Approach 1:
The patent introduces a negative voltage rail (-VDD) as an additional voltage dimension, allowing the amplifier to operate with increased total voltage swing (from GND to -VDD) while maintaining low positive supply voltage (1.2V or below). This enables high gain operation without distortion while preserving low power consumption characteristics.
Solution Approach 2:
A charge pump circuit is introduced as an intermediary component that generates the negative voltage rail from the positive supply voltage. This mediator enables the amplifier to access extended voltage range without requiring direct connection to high voltage sources, thus maintaining low power consumption while achieving high performance.
2Stability of the object's composition
If a negative charge pump is designed with a large volume holding capacitor to maintain negative output potential, then output stability is improved, but monolithic integration in ASIC chip becomes difficult
Solution Approach 1:
The charge pump circuit is divided into multiple stages (first charge pump stage, second charge pump stage) with distributed capacitance elements throughout the circuit. This segmentation eliminates the need for a single large holding capacitor, allowing all components to be implemented with standard integrated circuit capacitance values that can be monolithically integrated in ASIC chips.
Solution Approach 2:
The circuit elements serve multiple functions: the capacitance elements not only store charge but also function as part of the clocking mechanism and voltage generation. This multi-functionality reduces the need for dedicated large holding capacitors, enabling compact monolithic integration while maintaining output stability.
3Reliability
If a negative charge pump uses special high-voltage transistors or external capacitors, then performance is improved, but device complexity and production cost increase
Solution Approach 1:
The charge pump operates with voltage parameters within the standard CMOS process range (1.2V or below). By changing the operating voltage parameters to match standard process capabilities, the patent eliminates the need for special high-voltage transistors or external capacitors, reducing device complexity and production cost while maintaining performance through the negative voltage rail architecture.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution allows for a fully integratable negative charge pump with low power consumption and high-quality audio compatibility, capable of driving audio amplifiers with increased gain without additional electrical potential, reducing distortion and enabling production at low costs.
Implementation Method 1
The first inverter is connected between the supply terminal, the first clock terminal and the first charge storage
Implementation Method 2
The second inverter is connected between the first charge storage, the GND terminal, and the output terminal
Data Source
AI summary
A negative charge pump without the need for a negative supply potential. The negative charge pump can be manufactured utilizing standard CMOS processes. The charge pump includes a first inverter, a second inverter, a charge storage and a coupling element.