Scalable Protection Voltage Generation for Low Voltage Circuit Reliability
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Solution Overview
Problem
Modern integrated circuits and devices face challenges in operating with higher voltage power supplies due to reduced feature sizes and increased operating speeds, as they are typically designed for lower voltage tolerance, while externally supplied high voltages are often fixed and difficult to adjust.
Innovation Solution
A scalable protection voltage generation circuit and voltage protection ladder system that generates multiple protection voltages based on a supply voltage and high voltage, using a resistor ladder and cascode ladder configuration with bias generators to safely drop high voltages to suitable levels for low voltage circuits, allowing for high voltage signal handling with low voltage devices.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If higher voltage power supplies are used, then external voltage compatibility is improved, but low voltage circuit reliability deteriorates
Solution Approach 1:
The patent introduces a voltage protection ladder as an intermediary component between the high voltage external power supply and the low voltage internal circuits. This ladder generates multiple protection voltages that serve as intermediate voltage levels, allowing the low voltage circuits to operate safely while maintaining compatibility with high voltage external supplies. The protection ladder acts as a buffer that translates between voltage domains without direct exposure of sensitive circuits to high voltage.
Solution Approach 2:
The voltage protection ladder is segmented into multiple stages, each generating a specific protection voltage level. Instead of a single voltage translation step, the system divides the voltage reduction into multiple discrete levels (e.g., VPR1, VPR2, VPR3), where each stage protects specific circuits at appropriate voltage levels. This segmentation allows gradual voltage adaptation and provides multiple protection zones within the integrated circuit.
2Speed
If process feature sizes are reduced, then operating speed is improved, but voltage tolerance deteriorates
Solution Approach 1:
The patent applies local quality by providing different protection voltage levels to different regions or blocks within the integrated circuit. Each low voltage circuit block receives appropriate protection voltages tailored to its specific voltage tolerance requirements. This allows the circuit to maintain high operating speeds in advanced process nodes while each local region operates at its optimal safe voltage level, rather than imposing a uniform voltage constraint across the entire chip.
3Reliability
If voltage protection ladder is added, then low voltage circuit protection is improved, but device complexity increases
Solution Approach 1:
The voltage protection ladder is designed as a universal block that can serve multiple functions: generating multiple protection voltages, providing voltage level translation, and protecting multiple different low voltage circuit blocks simultaneously. By creating a multi-functional protection structure, the patent reduces the need for separate protection circuits for each voltage domain, thereby limiting the increase in overall device complexity while maintaining comprehensive protection.
Data Source
AI summary
According to an embodiment, a circuit includes a protection voltage generator coupled to a first voltage node, a second voltage node, and a ground voltage node, the protection voltage generator configured to generate a plurality of protection voltages at a first plurality of nodes based on the first voltage node and the second voltage node, and a voltage protection ladder coupled between the first voltage node and a low voltage circuit, the voltage protection ladder coupled to the plurality of protection voltages at the first plurality of nodes, the voltage protection ladder configured to generate a first low voltage based on the first voltage node and the plurality of protection voltages.