Bootstrap Sampling Switch Circuit for Stable ADC Signal Swing

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Solution Overview

Problem

Designing a satisfactory bootstrap circuit for wireless communications circuitry is challenging due to difficulties in maintaining a constant gate-to-source voltage across the input sampling switch, which can lead to degradation of DC voltage level and signal gain.

Innovation Solution

A bootstrap circuit is provided, comprising a bootstrap capacitor, transistors, and a resistive element, configured to maintain a constant voltage across the input and control terminals of the sampling switch, optimizing the performance of the sampling switch and the overall analog-to-digital converter by boosting the input resistance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a bootstrap circuit is designed to maintain constant gate-to-source voltage across the input sampling switch, then the DC voltage level and signal gain are improved, but the circuit complexity increases

Engineering Contradiction:
ImproveDC voltage level stabilityVSAvoidbootstrap circuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The bootstrap circuit is divided into multiple functional blocks: a voltage generation block that creates the bootstrap voltage, a voltage regulation block that maintains constant gate-to-source voltage, and a sampling switch block that performs the actual sampling. This segmentation allows each block to be optimized independently, improving overall reliability while managing complexity through modular design.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The circuit pre-charges the bootstrap capacitor during a tracking phase before the actual sampling operation. This preliminary action ensures that when the sampling switch closes, the gate-to-source voltage is already at the required constant level, eliminating the need for complex real-time voltage adjustment mechanisms during sampling.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If the input resistance of the bootstrap circuit is increased, then the signal swing and performance of the analog-to-digital converter are improved, but the circuit becomes more complex

Engineering Contradiction:
Improvesignal swing performanceVSAvoidcircuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

A buffer stage is introduced as an intermediary between the bootstrap capacitor and the sampling switch. This buffer stage presents a high input resistance to the capacitor while providing a low output resistance to drive the sampling switch, thereby achieving the desired signal swing performance without directly increasing the overall circuit complexity through additional active components.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The circuit transforms the impedance characteristics by using the bootstrap capacitor to create a virtual ground at the sampling switch gate. This parameter transformation allows the circuit to achieve high input resistance effects without requiring physically large resistors, thus maintaining compact circuit complexity while improving signal swing performance.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS12057857B2Bootstrap circuit with boosted impedance
Publication Date: 2024.08.06 APPLE INC
  • US12057857B2 patent drawing
  • US12057857B2 patent drawing
  • US12057857B2 patent drawing

AI summary

An electronic device may include wireless circuitry having analog-to-digital converter (ADC) circuitry. The ADC circuitry may include a sampling switch coupled to a bootstrap circuit. The bootstrap circuit may include a bootstrap capacitor, a first transistor coupled between an input of the sampling switch and a bottom plate terminal of the bootstrap capacitor, a second transistor coupled between the bottom plate terminal of the bootstrap capacitor and ground, and a resistor or transistor that is disposed between the first transistor and the bottom plate terminal of the bootstrap capacitor and that is configured to boost the input impedance of the bootstrap circuit.