Bootstrap Diode Semiconductor Device with Pinch-Off Region
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Solution Overview
Problem
High voltage semiconductor devices with bootstrap diodes face challenges in minimizing chip area and achieving high withstanding voltage while appropriately designing the pinch-off voltage of PN diodes.
Innovation Solution
The semiconductor device incorporates a JFET structure with a pinch-off region and deep well regions of different dopant concentrations and depths, allowing for adjustable current flow and pinch-off voltage, thereby minimizing chip area and enhancing withstanding voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a PN diode and JFET structure are provided to satisfy high withstanding voltage, then withstanding voltage is improved, but chip area occupied increases significantly
Solution Approach 1:
The patent merges the PN diode and JFET structures into a single integrated device. The JFET channel region is formed between the source and drain regions of the PN diode, allowing both structures to share common regions and achieve high withstanding voltage while minimizing chip area occupation.
Solution Approach 2:
The JFET structure serves multiple functions: it provides the required withstanding voltage through its pinch-off characteristics, acts as a voltage-controlled resistor for bootstrap operation, and integrates with the PN diode to form a compact multi-functional device that reduces overall chip area.
2Reliability
If PN diode and JFET structure are integrated for high withstanding voltage, then withstanding voltage is improved, but design complexity of pinch-off voltage increases
Solution Approach 1:
The patent applies different dopant concentrations to specific regions: the first and second doped regions have a first dopant concentration, while the third doped region has a second dopant concentration that is lower than the first. This local differentiation of doping characteristics enables precise control of the pinch-off voltage without increasing overall device complexity.
Solution Approach 2:
The pinch-off voltage is controlled by adjusting the dopant concentration in the third doped region relative to the first and second doped regions. By changing this key parameter (dopant concentration ratio), the pinch-off voltage can be easily designed and tuned to achieve the desired bootstrap operation characteristics.
Data Source
AI summary
A semiconductor device includes a source region and a drain region formed in a substrate and having different conductivity types, an insulating film formed between the source region and the drain region, a deep well region formed under the insulating film, and a pinch-off region formed under the insulating film and having a same conductivity type as the deep well region, wherein a depth of a bottom surface of the pinch-off region is different from a depth of a bottom surface of the deep well region.