Bootstrapped Sampling Switch Circuit for Low-Distortion ADC Front Ends

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Solution Overview

Problem

Existing sampling switch circuits face limitations in dynamic range due to input-dependent harmonic distortion, particularly when used as front-ends for analogue-to-digital converters (ADCs), especially at higher speeds and in direct RF applications.

Innovation Solution

The proposed sampling switch circuit incorporates a potential divider circuit and buffer circuits to maintain a constant gate-source voltage for the sampling transistor, reducing input-dependent on-resistance variations and enhancing tracking time constants, while eliminating the need for a bulky precharge capacitor to boost operation frequency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If a traditional bootstrapping circuit is used to maintain constant gate-source voltage, then input-dependent distortion is reduced, but the circuit requires a bulky precharge capacitor that limits maximum operating frequency

Engineering Contradiction:
Improveharmonic distortionVSAvoidmaximum operating frequency
Core Design Contradiction:
Measurement precisionVSSpeed

Solution Approach 1:

The patent removes the bulky precharge capacitor from the bootstrapping circuit, extracting the frequency-limiting element while maintaining the core bootstrapping functionality through an alternative capacitor arrangement that does not require precharging, thereby resolving the contradiction between distortion reduction and frequency operation

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent changes the operational parameters of the bootstrapping circuit by eliminating the precharge phase and using a different capacitor configuration, allowing the circuit to maintain constant gate-source voltage without the frequency limitations imposed by traditional precharge capacitor designs

Inventive Principle:
Principle #35Parameter changes

2Device complexity

If the sampling transistor operates with variable on-resistance due to input voltage dependence, then circuit simplicity is maintained, but dynamic range is limited due to harmonic distortion

Engineering Contradiction:
Improvecircuit simplicityVSAvoiddynamic range
Core Design Contradiction:
Device complexityVSMeasurement precision

Solution Approach 1:

The patent introduces a bootstrapping circuit as an intermediary mechanism that mediates between the simple sampling transistor and the distortion problem, using a capacitor and switch arrangement to maintain constant gate-source voltage and reduce harmonic distortion without significantly complicating the overall circuit topology

Inventive Principle:
Principle #24Intermediary (Mediator)

3Stability of the object's composition

If a precharge capacitor is added to the bootstrapping circuit to maintain voltage, then gate-source voltage stability is improved, but device complexity and circuit size increase

Engineering Contradiction:
Improvegate-source voltage stabilityVSAvoidcircuit size
Core Design Contradiction:
Stability of the object's compositionVSDevice complexity

Solution Approach 1:

The patent extracts the unnecessary precharge capacitor from the circuit, maintaining gate-source voltage stability through a simplified capacitor arrangement that achieves the same voltage maintenance function without the added complexity and size of a precharge capacitor

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent makes the sampling capacitor serve multiple functions - both sampling the input signal and maintaining the bootstrapping voltage - thereby eliminating the need for a separate precharge capacitor and reducing overall circuit complexity while maintaining voltage stability

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentEP4106198B1Sampling switch circuits
Publication Date: 2024.12.04 SOCIONEXT INC
  • EP4106198B1 patent drawingFigure 1
  • EP4106198B1 patent drawingFigure 2
  • EP4106198B1 patent drawingFigure 3

AI summary

A sampling switch circuit, comprising an input node, connected to receive an input voltage signal, a sampling transistor comprising a gate terminal, a source terminal and a drain terminal, the source terminal connected to the input node, a hold-control node connected to receive a hold-control voltage signal, an output node connected to the drain terminal of the sampling transistor, a buffer circuit having a buffer input connected to the input node and a buffer output connected to a track-control node, the buffer circuit configured to provide a track-control voltage signal at the track-control node dependent on the input voltage signal and switching circuitry configured to connect the gate terminal of the sampling transistor to the track-control node or to the hold-control node in dependence upon a clock signal.