Bootstrapped Word Line Driver With High-Voltage Isolation
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Solution Overview
Problem
Conventional word line driver circuits face limitations in high-speed operation and power supply headroom due to the absence of high voltage isolation between low voltage row drivers and word lines, leading to slow read speeds and impractical device sizes required to maintain speed and functionality.
Innovation Solution
A high-speed, low supply voltage tolerant bootstrapped word line driver circuit is introduced, featuring a gate bootstrapped transistor with a bootstrapped N-channel High Voltage MOS device, coupled with P-channel High Voltage MOS devices to overcome power supply headroom issues and provide high voltage isolation, enabling efficient operation at both low and high voltage levels.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a conventional LV row driver is used without HV isolation, then the circuit complexity is reduced and device size is minimized, but the word line cannot operate at HV levels resulting in poor program inhibit characteristics
Solution Approach 1:
A transmission gate is introduced as an intermediary component between the LV row driver and the word line. This transmission gate acts as a mediator that allows the LV driver to control the word line during read operations while isolating the LV driver from HV levels during program operations, thus achieving both low complexity and reliable program inhibit characteristics
Solution Approach 2:
The transmission gate is dynamically controlled by control signals (HV Pass/Iso and its inverse) that switch its state based on the operation mode. During read operations, the transmission gate is enabled to pass LV signals to the word line. During program operations, it is disabled to isolate the LV driver from HV levels on the word line, providing adaptive functionality that resolves the contradiction
2Reliability
If HV devices are used in the row driver to support HV levels, then program inhibit characteristics are improved, but the read speed decreases due to power supply headroom issues
Solution Approach 1:
Different parts of the system are assigned different voltage characteristics: the row driver and transmission gate continue to use LV devices optimized for fast read operations, while only the word line and associated HV circuitry operate at HV levels when needed. This localized application of HV capability maintains fast read speeds while achieving reliable program inhibit characteristics during program operations
3Speed
If the word line is isolated from HV during program operations, then LV devices can be used maintaining fast read speeds, but program inhibit characteristics deteriorate
Solution Approach 1:
The transmission gate provides dynamic isolation that adapts to operation mode. During program operations, the transmission gate is turned off to isolate the LV driver from the word line, allowing the word line to be driven to HV levels for improved program inhibit characteristics. During read operations, the transmission gate is enabled, allowing LV signals to pass through to the word line for fast read speeds. This dynamic control resolves the contradiction by providing both fast reads and reliable program inhibition at different times
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enables high-speed operation with improved program inhibit characteristics and reduced leakage, eliminating the need for complex HV control and minimizing device size, while maintaining high gate drive and isolating high voltages from low voltage row drivers.
Implementation Method 1
A gate bootstrapped transistor is coupled to the low voltage driver... enabling efficient operation at both low and high voltage levels... providing high voltage isolation
Data Source
AI summary
Disclosed are a circuit and a method for a high speed, low supply voltage tolerant bootstrapped word line driver with high voltage isolation. The circuit includes a low voltage driver. A gate bootstrapped transistor is coupled to the low voltage driver. A first transistor is coupled to an output terminal of the gate bootstrapped transistor. A substrate of the first transistor is coupled to a negative bias signal. A second transistor is coupled to a gate terminal of the gate bootstrapped transistor. A substrate of the first transistor is coupled to a negative bias signal.