Boron-Doped Silicon Buffer Layers for Etchant-Resistant GAA Transistors
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Solution Overview
Problem
The challenge in semiconductor manufacturing lies in preventing source/drain region damage during the replacement gate process, particularly due to insufficient protection from etchants, which is exacerbated by the triangular cross-sectional profile of boron doped silicon layers on (100) orientation substrates.
Innovation Solution
Forming boron doped silicon layers on (110) orientation substrates to achieve a rectangular cross-sectional profile, providing enhanced protection and etchant resistance during the replacement gate process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If boron doped silicon layers are formed on (100) orientation substrates, then the manufacturing process is standard and easy to implement, but the triangular cross-sectional profile provides insufficient protection against etchant leakage
Solution Approach 1:
The patent changes the substrate orientation parameter from (100) to (110) to transform the cross-sectional profile from triangular to rectangular. This parameter change in substrate orientation fundamentally alters the etching behavior and growth morphology, providing enhanced protection against etchant leakage while maintaining manufacturing feasibility
Solution Approach 2:
The rectangular cross-sectional profile achieved through (110) orientation substrate creates uniform protection around the channel layer, eliminating the geometric weakness of triangular profiles. This equipotential-like uniformity in protection distribution ensures consistent etchant resistance throughout the structure
2Reliability
If the channel layer is directly exposed during replacement gate process, then the process is simpler, but the source/drain regions suffer from etchant damage
Solution Approach 1:
The boron doped silicon buffer layer acts as an intermediary protective element between the etchant environment and the source/drain regions. This buffer layer absorbs or resists the etchant attack, preventing direct damage to the critical source/drain regions while enabling the replacement gate process to proceed
Solution Approach 2:
The buffer layer is formed in advance before the replacement gate process, providing pre-established protection against etchant damage. This beforehand cushioning ensures that when etchants are introduced during the replacement gate process, the source/drain regions are already protected by the buffer layer
3Productivity
If scaling down is continued to increase functional density, then production efficiency increases, but power dissipation increases requiring specialized devices
Solution Approach 1:
The patent employs CMOS device architecture which changes the operational parameters of the semiconductor devices to achieve low power dissipation. By using complementary metal-oxide-semiconductor structures with optimized channel properties, the device maintains functionality while reducing power consumption to accommodate scaled-down geometries
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The rectangular cross-sectional boron doped silicon layers effectively prevent etchant leakage, ensuring better device performance and junction integrity by offering increased volume and boron diffusivity, thereby reducing damage to source/drain regions.
Implementation Method 1
epitaxial growing a plurality of silicon layers on either side of each of the channel layers
Implementation Method 2
doping the silicon layers with boron
Data Source
AI summary
A method includes forming a plurality of channel layers above a (110)-orientated substrate, the channel layers arranged in a <110> direction normal to a top surface the (110)-orientated substrate and extending in a <110> direction perpendicular to the <110> direction; epitaxial growing a plurality of silicon layers on either side of each of the channel layers; doping the silicon layers with boron; epitaxial growing a plurality of first silicon germanium layers on the silicon layers; forming a gate structure surrounding each of the channel layers.