Electrical-Optical Bridge Chip With Parallel Through Links
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Solution Overview
Problem
Current integrated circuit packaging structures face limitations in density, performance, and cost due to the lack of electrical links parallel to optical links, which restricts the ability to interconnect multiple host chips and complicates the integration of electro-optical modules with silicon on insulator (SOI) bridge chips.
Innovation Solution
The introduction of a bridge chip with electrical through links and an optical interface, featuring electro-optical and optical-electro converters, allows for short reach data coordination between host chips and long reach high bandwidth optical communication with multiple IC packaging structures, eliminating the need for intermediate interface layers and reducing power consumption and cost.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If optical interconnects are used to achieve long reach high bandwidth communication, then bandwidth density is improved, but device complexity increases due to lack of parallel electrical links
Solution Approach 1:
The patent segments the interconnect functions by providing separate electrical through links and optical links that operate in parallel. The electrical through links handle short reach data coordination while optical links handle long reach high bandwidth communication, allowing independent optimization of each path and reducing overall system complexity.
Solution Approach 2:
The bridge chip is designed with multi-functionality, serving as both an electrical interconnect substrate and an optical I/O substrate. It provides both electrical through links for short reach communication and optical links for long reach communication, enabling a single component to fulfill multiple interconnect needs.
2Reliability
If SOI bridge chip is used to provide lateral optical interconnect, then optical signal confinement is improved, but adaptability deteriorates due to inability to interconnect with multiple package levels
Solution Approach 1:
The patent extends the interconnect capability from lateral (2D) to vertical (3D) by incorporating electrical through links that pass through the bridge chip substrate. This allows host chips on different package levels to be interconnected electrically, while optical links continue to provide lateral interconnect, achieving multi-dimensional adaptability.
Solution Approach 2:
The bridge chip acts as an intermediary substrate that mediates between host chips and multiple package levels. The electrical through links penetrate the bridge chip to provide direct electrical pathways, while optical waveguides remain confined to the lateral plane, allowing the bridge chip to serve as a versatile interface for both electrical and optical interconnections across multiple packaging levels.
3Reliability
If intermediate interface layer is used to connect host chip and optical module, then signal transmission is improved, but manufacturing complexity increases
Solution Approach 1:
The patent merges the functions of the intermediate interface layer and the optical I/O substrate into a single bridge chip structure. The bridge chip integrates both electrical through links and optical waveguides, eliminating the need for separate intermediate interface layers and reducing the number of assembly steps and components.
Solution Approach 2:
The bridge chip serves multiple functions simultaneously: it provides electrical interconnects through electrical through links, optical interconnects through lateral waveguides, and acts as a substrate for mounting host chips. This multi-functionality eliminates the need for separate intermediate interface layers, simplifying the manufacturing process.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution enables increased data rates, reduced optical power consumption, and lower costs by directly driving optical devices, allowing for higher bandwidth density and more efficient interconnectivity between host chips, while reducing the complexity of transceiver circuitry and optical hardware.
Implementation Method 1
The electro-optical converter is configured to convert an electrical signal to an optical signal
Implementation Method 2
the optical-electro converter is configured to convert an optical signal to an electrical signal
Implementation Method 3
the insulating oxide traps the light so that it may be steered along the wafer surface using waveguides
Data Source
AI summary
A bridge chip of an IC packaging structure includes E/O and O/E converters and a first wiring pattern interconnecting the converters to host chips and a second wiring pattern electrically connected to the host chips. An optical interface outputs the optical signals from a backside surface of the bridge chip. The optical interface receives optical signals through the backside surface. Electrical through links connected to the second wiring pattern output electrical signals generated by the host chips through the backside surface of the bridge chip. The packaging structure includes substrate with a trench provided in the top surface of the substrate and the bridge chip disposed in the trench. The host chips are directly connected to the top surface of the bridge chip and the top surface of the substrate. Optical signals are output from the packaging structure through an opening in the bottom surface of the substrate.