Bridge Die Protective Structure for Crack-Resistant 3D Packaging
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Solution Overview
Problem
The potential for crack propagation at the interfaces between semiconductor dies in multi-tier constructions, such as a system on integrated chip (SoIC), can lead to damage and failure of the semiconductor bridge die, compromising the integrity and functionality of the device.
Innovation Solution
The implementation of protective structures at the interfaces between semiconductor bridge dies and adjacent dies in a multi-tier construction, formed during the metallization process, to inhibit crack propagation and ensure the structural integrity of the semiconductor bridge die.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If protective structures are added at the interfaces between semiconductor dies, then crack propagation is inhibited and reliability is improved, but device complexity and manufacturing complexity increase
Solution Approach 1:
The protective structures are formed during the metallization process before the semiconductor bridge die is fully assembled and tested. By incorporating the protective structures at the interface between adjacent dies during the metallization stage, the design prevents crack propagation in advance while maintaining a streamlined manufacturing flow without requiring additional post-assembly steps.
2Reliability
If protective structures are added at the interfaces between semiconductor dies, then crack propagation is inhibited and reliability is improved, but manufacturing complexity increases
Solution Approach 1:
The protective structures are integrated into the existing metallization process rather than being manufactured as separate components. The same metallization steps used to create electrical interconnections are also used to form the protective structures at the die interfaces, merging two functions into a single manufacturing process and avoiding additional fabrication steps.
3Strength
If protective structures are added at the interfaces between semiconductor dies, then structural integrity is improved, but space consumption increases
Solution Approach 1:
The protective structures are placed only at the specific locations where crack propagation is most likely to occur - namely at the interfaces between adjacent semiconductor dies. Rather than adding protective features throughout the entire device, the solution applies reinforcement locally at critical stress points, maintaining structural integrity while minimizing overall space consumption.
Data Source
AI summary
A semiconductor device with a multi-tier construction includes a first tier having a first die, a second die spaced apart from the first die in a first direction and a fill material therebetween. A second tier overlays the first tier, and includes a bridge die partially overlaying the fill material and the first and second dies. The bridge die provides an electrical interconnection between the first and second dies in the first tier. The device also has a first protective structure aligned with a first interface between an end of the first die and the fill material that includes a first part formed on a first side of the first die at the end of the first die; and a second part formed on a first side of the bridge die. The first and second parts are aligned and form the first protective structure, mitigating cracking near the bridge die.


