Broadcast Compare Add Instruction for Sparse Vector Updates
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Solution Overview
Problem
Current vectorization of sparse update patterns is limited by data dependencies and conflicts, leading to inefficient code execution, especially with large numbers of conflicts, and is restricted to doubleword and quadword data types, resulting in low vector efficiency for smaller data types.
Innovation Solution
A broadcast compare arithmetic instruction that combines index comparison with data reduction in a single instruction, eliminating the need for permutations, mask computations, and inner while loops, and supports different index and data types, allowing for efficient vectorization of sparse update patterns.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional conflict detection and permutation-based vectorization is used, then data dependencies are handled correctly, but execution time increases significantly due to iterative permutations and mask computations
Solution Approach 1:
The patent combines conflict detection, permutation control, and accumulation operations into a single unified instruction (broadcast compare add). This merging eliminates the need for multiple separate operations including iterative permutations and mask computations, thereby reducing execution time while maintaining correct handling of data dependencies through the unified conflict detection mechanism
Solution Approach 2:
The patent performs conflict detection and generates permutation control information in advance as part of the single instruction execution. By preliminarily identifying conflicts and preparing control information before the accumulation operation, the patent avoids iterative detection and re-computation, thus reducing execution time while ensuring correct dependency handling
2Reliability
If permutation-based accumulation is used, then sparse update patterns are handled correctly, but device complexity increases due to multiple instructions and control mechanisms
Solution Approach 1:
The patent merges conflict detection, permutation control generation, and accumulation into a single broadcast compare add instruction. This consolidation reduces device complexity by eliminating the need for separate conflict detection instructions, permutation control mechanisms, and multiple accumulation instructions, while still correctly handling sparse update patterns through the integrated operation
Solution Approach 2:
The broadcast compare add instruction performs multiple functions simultaneously: it detects conflicts, generates permutation control information, and executes accumulation. This multi-functionality reduces the number of separate control mechanisms and instructions needed, thereby reducing device complexity while maintaining correct sparse update pattern handling
3Adaptability or versatility
If conventional vectorization is used, then doubleword and quadword data types are supported, but vector efficiency is low for smaller data types due to fixed-width constraints
Solution Approach 1:
The patent enables different data element sizes within the same vector operation by allowing flexible configuration of the broadcast compare add instruction. Each element in the vector can be processed with its appropriate size (byte, halfword, word, doubleword, or quadword), optimizing vector efficiency for smaller data types while maintaining support for larger data types through this localized adaptability
4Reliability
If iterative permutation and accumulation loops are used, then all conflict cases are handled, but the number of operations increases with large numbers of conflicts
Solution Approach 1:
The patent performs conflict detection and generates complete permutation control information in a single preliminary step within the unified instruction. This preliminary action identifies all conflicts and prepares the necessary control information before accumulation, allowing all conflict cases to be handled in one operation rather than through iterative loops, thus maintaining comprehensive conflict handling while improving execution speed
Data Source
AI summary
Systems, apparatuses, and methods for executing an instruction. The instruction includes fields for a first source operand, a second source operand, and a destination operand. A decoded instruction causes a reduction of broadcasted packed data elements of a first packed data source with a reduction operation and store a result of each of the reductions in a packed data destination, wherein the packed data elements of the first packed data source to be used in the reduction are dictated by a result of a comparison of broadcasted values of packed data elements stored in a second packed data source to the packed data elements stored in the second packed data source without broadcasting.


