Back-Side Illumination CMOS Image Sensor Overflow Path
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Back-side illumination type CMOS image sensors face challenges in reliably discharging surplus electrons, leading to issues like blooming and color mixture, due to the difficulty in replicating the N type substrate region on the light incidence side, which affects the efficient transfer of excess electrons to the substrate.
Innovation Solution
A solid-state imaging device configuration is introduced, featuring a photoelectric conversion portion with a first impurity layer, a second impurity layer of opposite conductivity type, and a third impurity layer of the same conductivity type as the first, connected to an impurity region portion, with a gate electrode covering the third impurity layer, forming an overflow path for surplus electrons to be discharged effectively.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Illumination intensity
If back-side illumination type CMOS image sensor structure is used to improve photodiode sensitivity, then light sensitivity is improved, but reliable discharge of surplus electrons becomes difficult leading to blooming and color mixture
Solution Approach 1:
The substrate is divided into multiple impurity layers with different conductivity types (first impurity layer with first conductivity type, second impurity layer with second conductivity type, third impurity layer with first conductivity type). This segmentation creates distinct functional zones that enable controlled electron discharge paths, resolving the contradiction by providing structured electron management while preserving the back-side illumination sensitivity advantage.
Solution Approach 2:
Different regions of the photodiode structure are assigned different impurity concentrations and conductivity types to create localized electrical properties. The first impurity layer has specific doping characteristics optimized for photoelectric conversion, while the second and third impurity layers have tailored properties for electron discharge control. This local differentiation enables simultaneous optimization of light sensitivity and electron discharge reliability.
2Reliability
If N type substrate region is formed on light incidence side to discharge surplus electrons, then blooming is suppressed, but device structure becomes complex and chip area increases
Solution Approach 1:
The electron discharge function is merged into the existing photodiode structure by integrating the first, second, and third impurity layers within the same device footprint. Rather than adding separate discharge structures, the discharge functionality is combined with the photoelectric conversion structure through strategic impurity layer placement, suppressing blooming without increasing chip area or excessive complexity.
Solution Approach 2:
The electron discharge mechanism transitions from a lateral planar structure (N type substrate region on surface) to a vertical layered structure (multiple impurity layers stacked in depth). This dimensional change allows electron discharge functionality to be achieved in the thickness direction of the substrate, reducing planar complexity and chip area requirements while maintaining effective blooming suppression.
3Reliability
If impurity layers are added to create overflow path for surplus electrons, then electron discharge reliability is improved, but manufacturing process complexity increases
Solution Approach 1:
The first, second, and third impurity layers are formed during the preliminary stages of photodiode manufacturing, integrating the electron discharge structure into the base fabrication process. By establishing the impurity layer configuration early in the manufacturing sequence, subsequent processing steps can proceed without additional complex operations, maintaining manufacturing simplicity while achieving reliable electron discharge functionality.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration allows for reliable discharge of surplus electrons, effectively suppressing blooming and color mixture by creating a controlled overflow path within the device, improving image quality without increasing chip area or causing dark current issues.
Implementation Method 1
a photoelectric conversion portion provided within the substrate, including a first impurity layer whose carrier polarity is a first conductivity type, and photoelectric-converts incident light into signal charge
Data Source
AI summary
In a manufacturing method for a solid-state imaging device, a photoelectric conversion portion including a first impurity layer whose carrier polarity is a first conductivity type is formed within a substrate, a second impurity layer, whose carrier polarity is a second conductivity type opposite to the first conductivity type, is formed on a surface of the first impurity layer so as to be in contact with the surface located on one surface side of the substrate, a third impurity layer, whose carrier polarity is the first conductivity type, is formed on the second impurity layer so as to be in contact therewith, a gate electrode is formed above the third impurity layer so as to cover the third impurity layer, and an impurity region portion, whose carrier polarity is the first conductivity type, is formed within the substrate so as to be connected to the third impurity layer.