Backside Illuminated Image Sensor Groove Topography
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Solution Overview
Problem
Backside illuminated (BSI) image sensors face reduced quantum efficiency due to light reflection from planarized silicon surfaces, leading to decreased light absorption and increased crosstalk between pixels.
Innovation Solution
The implementation of a modified surface topography with a periodic groove pattern and an equivalent gradient refractive index (GRIN) material, combined with a backside deep trench isolation (BDTI) structure of increased depth, enhances light absorption and reduces crosstalk by increasing the effective light incident area and improving device isolation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a planarized silicon surface is used in BSI image sensors, then device manufacturing is simplified and device dimensions are maintained, but quantum efficiency is reduced due to light reflection
Solution Approach 1:
The patent applies curvature by replacing the planar silicon surface with a microlens array structure having a convex curved surface. Each microlens is formed with a specific radius of curvature to focus incident light onto the underlying photodiode, thereby reducing reflection and improving light absorption efficiency while maintaining compatibility with standard BSI fabrication processes
Solution Approach 2:
The patent changes the surface geometry parameter from flat to curved by forming microlenses with controlled radius of curvature (typically 1-5 micrometers). This parameter change transforms the optical properties of the surface, enabling effective light focusing and reducing Fresnel reflections without altering the fundamental BSI device architecture or manufacturing complexity
2Reliability
If light absorption is enhanced in BSI sensors, then quantum efficiency improves, but crosstalk between pixels increases
Solution Approach 1:
The patent applies segmentation by dividing the continuous silicon substrate into isolated pixel regions using deep trench isolation structures. These trenches, filled with dielectric material, physically separate adjacent photodiodes and extend through the entire silicon thickness, preventing lateral charge carrier diffusion and optical crosstalk while allowing each pixel to independently absorb light through its dedicated microlens
Solution Approach 2:
The patent applies local quality by creating region-specific optical focusing properties through individually shaped microlenses positioned over each pixel. Each microlens is optimized with specific curvature and dimensions to focus light precisely onto its corresponding photodiode active area, thereby enhancing local light absorption efficiency while the isolation trenches provide local electrical and optical separation to prevent crosstalk
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach increases the quantum efficiency of BSI image sensors by reducing Fresnel reflections and enhancing light input efficiency while maintaining device dimensions, and effectively isolates pixels to minimize crosstalk.
Implementation Method 1
increases the quantum efficiency of BSI image sensors by reducing Fresnel reflections and enhancing light input efficiency
Implementation Method 2
an equivalent gradient refractive index (GRIN) material, combined with a backside deep trench isolation (BDTI) structure
Data Source
AI summary
The present disclosure relates to a semiconductor image sensor with improved quantum efficiency. The semiconductor image sensor can include a semiconductor layer having a first surface and a second surface opposite of the first surface. An interconnect structure is disposed on the first surface of the semiconductor layer, and radiation-sensing regions are formed in the semiconductor layer. The radiation-sensing regions are configured to sense radiation that enters the semiconductor layer from the second surface and groove structures are formed on the second surface of the semiconductor layer.